I am writing a device driver to interface two E1 channels to an MPC860 using the Time Slot Assigner. I have two Maxim/Dallas framers interfaced to TDM-A and TDM-B, respectively.
The A channel is serviced using SCC2 in transparent mode, and it works wonderfully, both for receive and transmit.
The B channel is serviced using SMC2 in transparent mode, and it is erratic on the transmit side, while the receive side works as expected.
The problem I see, is that transmit synchronization does not reliably occur on the frame sync pulse, but offset by a varying number of timeslots. Once started, the channel maintains its frame alignment (i.e. the back to back frames stay syncronized with the wrong offset.) It is almost as if the SMC had managed to latch into "inherent synchronization", as described under the SCC.
I would be grateful if anyone with experience in operating a QUICC SMC in ransparent mode with a Time Slot Assigner would contact me.
/ Lars Poulsen