Marvell switch 88E6171R - initialization problem

Hi, all.

Hope I am in a right place with my question. I have a LPC2368-based custom board with Marvell switch 88E6171R installed.

My problem is related to management of the switch device via MDC/MDIO bus.

The device's user's manual says that on one hand the device supports MDC frequency up to 20 MHz. On the other hand, it says, that minimum MDC clock cycle is 120 ns, i.e. 8.33 MHz.

I did take a look at the similar switch device evaluation board MDC lines with a scope, there are two of them: CPU_MDC and PHY_MDC. The CPU_MDC line seems to be idle all the time and I guess that the reason is that the CPU_MDC goes active only during and MDIO activity initiated by a CPU. But, the PHY_MDC line is constantly active at ~4.9 MHz.

I am really confused to what frequency to configure the CPU-driven MDC line on my board.

Please contribute if you have any experience related to the topic.

Thanks in advance for your time.


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You should contact Marvell for the data sheet. You'll need it eventually, and in my experience with them, if you'll need the data sheet eventually you'd better start the process of filling out NDAs now.

Rob Gaddi, Highland Technology
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Rob Gaddi



It's usually better to follow the small print (aka AC Electrical Specifications) :-) Do you really expect to be doing so much traffic over the MDIO bus where it would matter much?

We use the 88e6161 on a project - on that chip the PHY MDC line is used to poll the registers of an external PHY with the switch acting as a master. IIRC there is a way to turn the polling off.

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