I meant to add comp.arch.embedded also to my original post (which went into comp.dsp).
I am working on a digital PLL design for a motor control application and I need some help with the control-loop aspects. The end goal is to have my motor achieve phase lock with a reference signal.
Some background information:
My system consists of an FPGA which implements the "digital logic" end of things such as the Frequency/Phase detector + error counters, PWM controller, etc. The PFD is setup to drive a counter which keeps track of the phase difference(in terms of counts) between my motor and a reference clock. The FPGA is also paired up with a micrcontroller which I am using to implement a PID loop, provide debug output, etc.
The DC motor I am using has an output that goes high once per revolution ("tach sense") which feeds one input of the PFD(realized in the FPGA). The other input to the PFD is an external clock signal, so the PFD compares a reference clock and the motor tach pulse train and spits out an error between the two in terms of counts(it also has an output lets me know if the motor is faster or slower than the reference clock).
Since I am implementing a digital PID controller (in software on the uController), usually the sampling rate ("Ts") is factored in the conversion from a continuous-time to discrete-time control-loop. If it's important, I am using the Tustin or Bilinear transform to go from C-->D.
The issue I face is that my error counter can only be read when the only when the motor has spun around and the reference clock has come by(the FPGA logic provides a signal that interrupts the uC when a new error is available and then the uC reads the error counter in the FPGA).
Given that the motor will probably be speeding up/slowing down as a result of the control-loop, this means that I probably will not receive errors at periodic intervals, thus I cannot factor in one Ts into my PID code for my discrete-time implementation.
Can I just keep track of the time between each error event, convert that to a Ts and use that as my Ts each time I get a new error ("variable sampling rate")?
Are there any draw backs to this technique?
Are there any alternative methods?
I appreciate all suggestions and information.