Enabling instruction cache

Oct 04, 2007 2 Replies

Hi,



in the manual of my TriCore TC1796 processor I see that by default the instruction cache is disabled. The manual says that the bit 1 of the PMI Control Register "PMI_CON0" must be set to 1. I have no idea how to set it. Can you give me any hints.



Regards, Tim


Not familiar with that CPU and you do not mention language / environment / OS, but could be something as simple as this:

(in C, assuming PMI_CON0 is a 16 bit register located at a reachable physical address)

#define PMI_CON0 [address of PMI_CON0] #define ENABLE_INS_CACHE 0x0002

void enable_instruction_cache() { volatile uint16_t *pmi_con0p = (uint16_t *)PMI_CON0; *pmi_com0p |= ENABLE_INS_CACHE; }

If you are trying to do it from an application level program running on a system with virtual memory, you will have to map the PMI_CON0 register to your application virtual address space first. How to do that depends on what operating system you are using.

Roberto Waltman

[ Please reply to the group, return address is invalid ]

Thing you should know _

1) Bit Manipulation 2) volatile keyword 3) Memory Mapping 4) Manual

Basic Bit manipulation tricks on that particular register will help you out.

a &= ~0x4; /* Clear bit 2 */ a |= 0x4; /* Set bit 2 */ a &= ~(1

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