Cache validity granularity

Nov 05, 2007 1 Replies
T

Hi,



I've a DSP where the instruction cache is specified as follows:



­- Two-way set associative cache ­- LRU replacement algorithm ­- Cache line size=256 bits(4 double-words) ­- Validity granularity (4 double-words per cache line)

What does "validity granularity" means?



Regards, Tim


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A

The fact that when one bit (or more) of those 256 in a line gets "dirty" (changed), the whole line (becoming "invalid") will be written back?

My two pence, Adrian

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