HI
I used the hardware configuration shown in
The source code here:
#DEFINE RW PORTE,0 ; RE0 Read/Write #DEFINE RS PORTE,1 ; RE1 Register Select #DEFINE CS PORTE,2 ; RE2 Chip Select
HI
I used the hardware configuration shown in
The source code here:
#DEFINE RW PORTE,0 ; RE0 Read/Write #DEFINE RS PORTE,1 ; RE1 Register Select #DEFINE CS PORTE,2 ; RE2 Chip Select
HI
I used the hardware configuration shown in
The source code here:
#DEFINE RW PORTE,0 ; RE0 Read/Write #DEFINE RS PORTE,1 ; RE1 Register Select #DEFINE CS PORTE,2 ; RE2 Chip Select
movlw b'00000111' movwf PORTE ; RW,RS,CS = 1 call DELAY250 ; 250 mS Delay
;****************************************************************************** ; Configure the internals registers ;****************************************************************************** bcf RW ; Write mode bsf RS ; Internal register bcf CS ; CS = 0
movlw b'00001001' ; to A register movwf PORTD
movlw b'00000000' ; to B register movwf PORTD bsf CS ; CS = 1
;****************************************************************************** ; To sending DTMF code ;****************************************************************************** bcf RW ; Write mode bcf RS ; Output register
movlw (The code to send) movwf PORTD bcf CS nop bsf CS
Note: The PORTD is used to data bus from CM8880. The phi2 input is connected to Vcc by 3.3Kohm resistor.
Somebody knows the correct form of configuring and operate the CM8880?
Thank you in advance
Not sure, but try doing this:
bcf RW ; Write mode bsf RS ; Internal register movlw b'00001001' ; to A register movwf PORTD
bcf CS ; CS = 0
--- some sort of delay here -----
bsf CS ; CS = 1
movlw b'00000000' ; to B register movwf PORTD
bcf CS ; CS = 0
--- some sort of delay here -----
bsf CS ; CS = 1
From what I can see, the chip looks at the data lines once you pull CS low. It's possible that the chip is latching the data lines once CS is pulled low and your output to PORTD is not seen. I'd have to look at the datasheet to see the timing.
It's also possible that the chip might look at the data lines when CS transitions from low to high. In this case, it would see the data from your second output to PORTD and not your first. You need to toggle CS for both transactions.
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