Clarification about Atmega128

Hi all, We are using atmega128 for one of our project. I heard that it is a 8 bit microcontroller, ok its accumulator and its data bus are 8 bit width. Then what about is address bus, is it also 8 bit width? Because for this 8 bit it can address only up to 2^8 = 256 location. Then how it can address 4096 SRAM (4K) and 131072 Flash (128K). Can anybody clear me on this doubt? Thank you

With regards marans

Reply to
Tamilmaran S
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In article , Tamilmaran S writes

"8 bit" refers to the data bus width, in every micro I have ever heard of.

In the mega128 the address bus is 16 bit and each flash location is a word (16 bits) rather than a byte. Hence there are 64K of flash locations but actually 128K bytes of flash.

Tim Mitchell
Reply to
Tim Mitchell

A 4 bit cpu thus only has 16 adress locations ? There isn't that much that can be done then.


Ing.Buero R.Tschaggelar -
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Reply to
Rene Tschaggelar

Almost certainly not.

You do need clarification, but not so much on the Atmega128 in particular, but on what it generally means when somebody describes a CPU as "n-bit".

That subject has been rehashed here a couple times already, and the outcome is that this classification is not nearly as well-defined as one might think. A typical CPU generally has several different n-bit qualities at the same time. Factors to look at are:

1) the ALU width (i.e. what's the widest object you can do all mathematical and logical operations on?). This sometimes has to be considered separately for "expensive" operations, notably mul/div 2) register width (again, there could be several classes of registers of different width) 3) (optional) external data bus width 4) (optional) external address bus width 5) (optional) internal address bus widths (cache line size,...) 6) (optional) separate I/O port bus widths

It's conceivable for all of these do be different from each other, on a single CPU, although I'm not aware of any actual hardware of that type.

A "typical" microcontroller would have ALU width, data bus width, I/O ports and the majority of register widths the same, while some registers, and the address bus are about twice as wide.

Hans-Bernhard Broeker (
Even if all the snow were burnt, ashes would remain.
Reply to
Hans-Bernhard Broeker

The AVR is also a harvard architecture. Seperate code and data spaces. So it can address 64K RAM as well.

Regards Anton Erasmus

Reply to
Anton Erasmus

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