Bringing up a PXA250 board

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I have built a PXA250 board around the form factor reference design
from Intel.  So far, I have been able to (1) get a JTAG connection
using OCDemon and Wiggler, and (2) flash (and verify the flash) a
u-boot boot-loader using openwince and the Wiggler.

I hate to say I'm stuck, but I have not been able to get the PXA250 to
do more than 1 step out of Reset-- either from JTAG-reset or
hard-reset-- which is a Branch from 0x00000000 to 0x00000060.  When I
"Reset and Go" from OCDemon I get the error "run_target_from_pc:
target bus error (20:11)" which I cannot interpret.  This is before
initializing anything-- i.e. SDRAM, etc.

I would appreciate any clues or ideas, and I have attached some
(possibly) relevant information.

Gordon

A. Board info
   PXA250 Stepping B1 400MHz
   64MB 100MHz SDRAM
   4MB Strataflash
   SDCard
   Power supply

B. OCDemon data after hard-reset
   PC: 00000000     SP: FFFFFFFF    LINK: 00000054    CPSR: 180000D3
   B    060H   ! Reset

C. OCDemon data after "Step"
   PC: 00000060     SP: FFFFFFFF    LINK: 00000054    CPSR: 180000D3
   MRS  R0, CPSR

D. OCDemon data after "Go"
   PC: 00000060     SP: FFFFFFFF    LINK: 00000054    CPSR: 180000D3
   MRS  R0, CPSR
   "run_target_from_pc:target bus error (20:11)" appears in the bottom
left panel.


and that's all I have been able to do...
again, thanks in advance.

gordon

Re: Bringing up a PXA250 board
Bus Error means the CPU is trying to access a memory location but nothing is
responding. From what you're saying, there's a branch to $60 at location 0.
What instruction is at location $60? I'd think that might give a clue.

Re: Bringing up a PXA250 board
Thanks, Gary.

Address $60 is in flash, but seems to be readable because it OCDemon
de-assembles it correctly.  What puzzles me is that the instruction
which fails is the "MRS R0,CPSR" which, as far as I know, involves
nothing off-chip.  Have I misunderstood this?

In the meantime, I have been able to load some other innocuous
instructions (not involving the CPSR) into $8000 (also still in flash)
that are able to execute in Debug mode; i.e.  I am able to step
through them.

Do you know anything about CPSR anomolies?

I appreciate your help.

Gordon

Re: Bringing up a PXA250 board
It might not be the instruction at $60 that is giving the problem, but possibly
the instruction after that. As you point out, OCDemon seems to fetch it just
fine. Instead of a GO, do another step and see what the registers are. I think
the PC should be $0C if it's an instruction prefetch problem, or $10 is it's a
data fetch problem. The low 5 bits of the CPSR should be %10111 which means the
CPU is in Abort mode. The LINK register should have the address of the aborted
instruction +4 for prefetch or +8 for data fetch.

Re: Bringing up a PXA250 board
Hmm. The exception stuff I replied with was from an ARM6 manual I had sitting
around. Looks like things might be different on the PXA so consult the User
Manual on what happens on an Exception.

Re: Bringing up a PXA250 board
Will do.

I have experimented with a bunch of different instructions, and the
common fail-point is reading instruction from flash with address <=
0x0800.  Everything else seems fine [so far...]

Thanks,

Gordon

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