AVR virgin checklist ?

Oops meant Ponyprog not avrdude

martin

icros/siprog.html

A lot of AVR gotchas seem to involve misprogramming the various fuses. You can end up with the wrong clock source, or a clock that's

But in my own experience I've found them to be pretty bulletproof to program.

Mike

this

I'd gathered that, so that is why I did not do any bit twiddling of anything other than the DDR.

Thanks for the clock speed/program tip

martin

The DDR is in a different space than the AVR fuses. The fuses are essentially dip switches which configure the device the instant power is applied. Does things that need to be done before the program starts running such as selection of clock (RC, crystal, resonator, etc), dividers, startup delay, enable/disable of DebugWire or JTAG, etc. Not normally reachable from a running program.

What Mike was cautioning was that if one only has easy access to JTAG its easy to goof and disable the JTAG interface and have to fire up an ISP to re-enable JTAG. Have read many horror stories where someone managed to mess up the fuses and had a hard time getting back inside the chip to set them to sane values.

That's exactly why our first phase was Jtag only, second phase was Jtag and Spi, third phase is Spi only and four phase will be 6502 ROM.

Have heard the 6502 was available as a library for integration into FPGAs. She was a nice old lady who never really tested the MCU market.

Yes, we found a company to integrate the 6502 with an LCD controller. It's tough to work with, but it's cheap.