I have seen plenty of ARM MCUs out there with impressive power consumption, but a very few offer SDRAM, and only one has PCI interface.
The motorola types, Dragonball and coldfire have these features, but are an order of magnitude more expensive on power. What is the least power consuming 32-bit MCU with glueless SDRAM and PCI interfaces? I'd prefer architectures that can use the PalmOS 4.0 or higher (ARM9 or
68k). I wonder if adding a PCI interface chip or SDRAM interface chip to an ARM9 or even an ARM7 will take lower power than all current offerings.
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offerings.
Question is why you need PCI? PCI uses 50-60 pins and toggles most of those pins at 33-66 MHz. Does not sound like low power to me...
Most people building ARM will build a chip which contains the things you normally put on PCI, and that will draw lower power.
If you need high speed connection to something, the ARM options are typically USB or other serial interfaces. You can run 100 Mbit per second on an Ethernet interface, so if you have an FPGA, maybe you can connect directly to an MII?
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low-cost computer. I'd be adding modules on it, like a soundcard, various nics, and pcmcia options. High on the list is an embedded graphics chip. I'm not sure if I can interconnect all these through other busses, or afford their cores for FPGAs.
I know PCI gets power hungry, but using a complete x86 system like the STPC, Geode is more power demanding, and for reasons stated above, PCI is necessary. So the aim is any good MCU with low power ratings (nonx86), and PCI and SDRAM.
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An MPC870 @66MHz with 2 SDRAMs and some peripherals will require approx. 2..3Watts. This PPC core has no PCI interface.
100mW sounds not possible for what you plan to do. If your application is idle most of the time (say 99%) you can however look for a CPU with power- saving sleep modes. This can reduce power over time significantly.
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was
I think that the CPU uses about 60 mW (VccCORE) at 180 MHz but you can run this at a much lower speed if you want to so, you may be able to run it close to 10 mW. Alternatively run at high speed, and then stop clock. The AVR can handle events meanwhile at low power. The CPU can turn off peripherals selectively, so anything you dont need only draws leakage...
The SPI dataflash is not on the same bus as the SDRAM, so only the capacitance of the SDRAM (and the FPSLIC) is visible to the CPU. Most other CPUs put the Flash on the same bus as the SDRAM which increases the capacitance a lot, and thus also the power. The dataflash can be powered down after U-boot has booted Linux.
If you are really out after low power, you can run the SDRAM at 1.8V while the rest of the I/O run at 3.3V. The Bus has its own I/O. The bus runs at 60 Mhz.
The Ethernet is going to be a Power Hog, due to some problem in the implementation. IIRC, th Ethernet does not power down unless the 50 MHz clock disappears, which is doesnt. I am pretty sure that an External PCI Ethernet is going to use a lot more anyway. For really low power it is best not used.
The AVR should use maybe 10 mW at 3.3V if you run it at slow speed.
The CPLD draws 40 mA @ 3V - terrible, but only when the SPI/Dataflash is used. If not, it powers down automatically to 5 uA. Next year, bettewr parts will reduce to < 20 mW. The SPI speed will affect power consutmpion and if slower troughput is OK, then lower power results.
FPSLIC will use minimum 100 uA leakage, but the power consumption of this will of course be depending on what is inside the FPGA.
No clue what the RS-232, CAN drivers or so will draw. As long as you run USB only internally, you do not have to provide 100/500 mA. Only what the other end needs.
You make your own judgement if this results in 3 Watts or if it is closer to
100 mW
--
Best Regards,
Ulf Samuelsson ulf@a-t-m-e-l.com
This is a personal view which may or may not be
share by my Employer Atmel Nordic AB
Well, if it doesn't have to be an ARM, why not consider a MIPS RISC device? VR4133 from NEC is quite interesting. It includes an SDRAM interface, Ethernet Macs and PCI. Power consumption at 266 MHz is
200mA (typ.) at 1.5V and 30mA (typ.) at 3.3V. It will be less if you run it a reduced speed. Performance costs power, so the question is basically which kind of performance you have in mind for the 100mW that you want to spend. And also look for on-chip memory or caches. Accesses to external memory are very costly for the power budget.
Now this looks VERY interesting. I'm not too bothered about power, something like 100MIPS, or a 133MHz Pentium1 with 32mb ram is good. The idea is a simplistic Linux based computer, but with the full array of tools like web browser, office tools etc. I understand PCI takes both power, and requires 3.3v at least. External ram will also be costly, so I'll try to do one chip of 32mb, maybe at reduced clock, and the MCU itself at 100MHz or so, possibly running at dynamic speed.
The device will hopefully be able to run with disposable batteries, and should run for at least 10 hours straight (full use), unlike current laptops. So the higher the power usage gets, the more batteries I'll have to add, the less attractive it will seem compared to a laptop. It will also kill my remote hope for a solar powered
802.11-run laptop.
The PCI is necessary. None of the MCUs have a good video device (3d accelerated), none have 802.11a/b/g, few have pcmcia controller etc. Best would be to have an x86-based chip, next ARM, next anything else since the software support for ARM and x86, at least in Linux, is good. This mips devices gives me a good alternative to look at beside the x86 and arm, at the cost of wrestling with linux/netbsd to make things go.
Guess some more homework is needed. If you plan to have a 3D accelerator, have a look at that power consumption rather than the main CPU. These things are compact heaters. Simplify you graphics, have a look at the highend Sharp ARM microcontrollers. So let's assum your graphics can be done with the embedded controller, the LH7A404, ARM9 based micro might be your best bet.
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