Inverted Pins

When I see an inverted pin in a timing diagram do I need to invert it or what?

Basically I'm looking at a pic that has overbar(MCLR). IN the timing diagram it shows a high voltage for high. But does this mean that the physical voltage into the pin on the device needs to be inverted?

It seems reasonable that if they went through the trouble to put the overbar in the pin then it means its inverted with respect to the rest of the logic... but I do not know if they already inverted it on the timing diagram or if I'm support to invert it or if its really an internal thing and I don't have to worry about it(i.e., just treat it like a normal pin)?

For example, one of the timing diagrams shows that Vdd goes from low to high and then overbar(MCLR) goes from low to high momentarily. If MCLR didn't have the overbar then I would actually have it go low to high as it shows. But since MCLR does have the overbar it seems to imply that I should invert the pin?

In the data sheet it says "This line is brought low to cause a Reset". So it seems that it really means the pin is inverted and the timing diagram does not reflect this? (or does it and the and should follow the diagram?

In general, basically when I see an inverted pin and any timing diagrams I can essentially think of the pin as non-inverted but just put in inverter on the pin? (or in my case I'll just flip it in the software)

(just want to make sure)

Thanks, Jon

Reply to
Jon Slaughter
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John:

The overbar on your MCLR pin indicates inverted logic. Just tie it to Vcc (HIGH) for the chip to operate normally. When you need to reset the chip, just pulse it LOW (typically with a pushbutton tied to ground).

Hope this helps. Aaron

Reply to
abrenneman87

....

This is called "active low". "Inversion" doesn't really have much applicability in this context; to be "inverted", there had to have been something to invert. The timing diagram should show you exactly what physical signals go in and come out.

Something here might help to shed a little light on this:

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Good Luck! Rich

Reply to
Rich Grise

Jon,

The overbar, in this case, indicates that the function is active LOW. In other words, a LOW on the pin causes a reset to take place. The timing digrams should depict this as it really is and you don't have to do anything to change them. The !MCLR (the exclamation point is another way to indicate this) is normally held HIGH and is brought LOW, momentarily, to effect the reset.

You wrote that, "For example, one of the timing diagrams shows that Vdd goes from low to high and then overbar(MCLR) goes from low to high momentarily."

Which PIC and which timing diagram in the datasheet are you looking at?

Richard

Reply to
Richard Seriani

It means the pin is ACTIVE LOW.

In other words, asserting the pin LOW causes the function (presumably master clear in this case).

Graham

Reply to
Eeyore

Think ACTIVE LOW.

Graham

Reply to
Eeyore

Thanks guys, I think I got it.

Reply to
Jon Slaughter

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Page 22.

I think I got it. Thanks.

I have another question regarding the same spec though. Maybe you can take a look at my other post about it if you end up looking at the pdf. Its on page

21 regarding Note 1.

Thanks, Jon

Reply to
Jon Slaughter

If the reset pin is electrically active-low, but their timing diagrams show it up for the reset state, they should be taken behind the woodshed and whupped.

And they should be given one extra lick for using the passive voice, as "This line is brought low to cause a Reset." A lot of the time, it's unclear whether people are talking about levels or edges, or even whether the damned pin is an input to the chip, or an output.

John

Reply to
John Larkin

I'm personally having a lot of trouble understanding the protocol from the spec. First they introduce the different methods out of order and then introduce the protocol out of course. They also do not explain anything in great depth and leave, at least to me, a lot of ambiguity.

I would hope that someone writing the docs would want to put as much specific information and examples in so that there could be no ambiguity. Its not like its rocket science but if you don't do the exact protocol then its not going on work. Maybe I'm just stupid though. I'm know I'm just guessing at a few things and only about 90% sure and that makes me uncomfortable as I need to be 99.999%. (which may or may not be their fault but I feel it is a half ass spec(ok, maybe a quarter ass spec.))

Jon

Reply to
Jon Slaughter

Do you have a link to this data sheet?

Thanks, Rich

Reply to
Rich Grise

See my other thread "Not sure about PIC ICSP Spec". It has the link there.

Reply to
Jon Slaughter

--
Switch to Freescale.
Reply to
John Fields

That particular diagram is showing how to get the processor to enter the ICSP (in-circuit serial programming) mode, not how to reset it.

Reply to
Andy

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