Hi,
I'm having trouble understanding the 4046 PLL data sheet. I want to lock on to a frequency of 200KHz and remain locked between 150KHz and 250KHz. From the data sheet I worked out I needed:
C1 = 100pF R2 = 100K R1 = 66K
But when I try these components the frequencies are much higher.
Can anyone tell me what I'm doing wrong? The data sheet can be seen here:
I'm using 2.b on page 9 with:
Fmin = 150KHz Fmax = 250KHz
Cheers,