Sto cercando un modello Spice per BJT che comprenda anche il fenomeno di breakdown, per entrambe le giunzioni.
Nel mio archivio ho trovato un vecchio post (del 2002), che riporto di seguito, in cui si parla di un modello per la sola giunzione B-C.
Ho fatto una ricerca sul web ma non ho trovato modelli più completi, almeno non tra gli articoli accessibili (gli IEEE non li vedo).
From: stefano delfiore Newsgroups: it.hobby.elettronica Subject: Re: modellazione breakdown bjt Date: Thu, 19 Sep 2002 22:26:29 GMT
Luigi wrote:
Questo è l'articolo pubblicato su Electronics design il 28 marzo 1991 nella rubrica "ideas for design". Le figure sono state realizzate con fidocad. Il testo era in lingua inglese ed è rimasto in lingua inglese. Spero possa essere utile. Alcuni nomi di parametri nel modello G2N2222A, sono nominati in modo diverso.
C2=ISE IK=IKF PC=VJC MC=MJC PE=VJE ME=MJE VA=VAF
------------------------------------------------------------------------ Spice2 models bjt breakdown Donald B.Herbert
26284 Via Desmonde,Lomita,CA 90717------------------------------------------------------------------------ Avalanche breakdown phenomena in bipolar junction transistors has been characterized in literature for a long time.(1,2) The multiplication factor M is commonly used to formulize the increase in collector current at or near avalanche breakdown, where M=1/[1-(Vcb/Va)^N]. In this equation, Vcb represents the applied collector-base voltage, Va is the avalanche-breakdown voltage, and N is the breakdown rate. N is an adjustable index depending on material constants and geometrical factors;for a silicon junction, N is about 3. The application of the M factor can be extended with a Spice2 implementation. This is useful to study transistor operation in the vicinity of avalanche breakdown in various circuit configurations. The multiplication factor can be added to a Spice2 bipolar transistor model in the form of a controlled current source connected from collector to base with a current equal to (M-1)*Ic (fig.1). This is similar to a previously pubblished approach(1). Consequently, the added current source implements a total equivalent collector current equal to M*Ic, which reduces to Ic at Vcb voltages well below avalanche breakdown. In Spice2, the augmented transistor model can be implemented with an equivalent circuit(fig.2).In this circuit, the current-controlled current source F implements (M-1)*Ic and the voltage-controlled current source G in the auxiliary circuit implements a current equal to (Vcb/Va)^N. The constants voltage source V1 and V3 are added as current sensing elements to control F. As a result, they have a dc value of zero. The current, If, implemented by way of F is: If=I(V1)*I(v3)+I(V2)*I(V3) which is equivalent to (M-1)*Ic. Note that F is connected to the internal collector and base nodes. That is, it's internal to the collector and base bulk resistances, Rc and Rb,respectively,which are added external to the Spice2 transistor model. The Spice2 coding for the augumented transistor model is supplied in the form of a subcircuit model for a 2N2222 transistor using typical data (see the table). Also, N is defined to be 3 and Va is 200. The augumented transistor model is also extended by Spice2 to supply a small-signal ac (frequency-domain) analysis using Spice2 standard approach. In other words, small-signal transconductance and conduttance values for F and G are determinated by Spice2 from a large-signal dc bias-point calculation. They're incorporated automatically into the small-signal equivalent circuit that includes standard hybrid-pi models of the built-in transistor elements. The small-signal circuit provided can be used to study frequency response and stability when a transistor operates in the avalanche-breakdown region.
* 1-Linvill,John G., and Gibbons,James F."transistors and active circuits". New York:McGraw-Hill,1961. 2-Fitchen, Franklin C."transistor analysis and design". New York:Van Nostrand Co.Inc., 1966. 3-Nagel, Laurence W."spice2: a computer program to simulate semiconductor circuits". ERL-M520(May 9,1975). Electronics Research Laboratory, College of Engineering,University of California at Berkeley..SUBCKT Q1 6 22 33
- | | |
- COLLECTOR BASE EMITTER
- RB 22 2 7 Q1 1 2 33 G2N2222A V1 4 2 RC 6 66 0.7 V2 66 1 F1 66 4 POLY(3) V1 V2 V3 0.0 0 0 0 0 0 1.0 0 1.0
- Va=200 N=3 G1 0 3 POLY(1) 1 2 0.0 0.0 0.0 1.25E-7
- P0 P1 P2 P3=(1/Va)^3 V3 3 0 .MODEL G2N2222A NPN(BF=240 IK=.1923 C2=923 NE=2 BR=1
- RE=0.007 CJC=12P PC=0.75 MC=0.33 TR=176N IS=0.0165P
- CJE=20P PE=0.75 ME=0.5 TF=0.265N VA=55) .ENDS Q1
fig.1 (disegno formato fidocad)
[FIDOCAD ] MC 55 45 0 0 300 LI 70 35 70 15 LI 70 55 70 70 LI 55 45 30 45 SA 70 15 SA 70 70 SA 30 45 TY 75 70 5 3 0 0 0 * E TY 75 15 5 3 0 0 0 * C TY 30 40 5 3 0 0 0 * B EV 40 25 50 35 LI 45 35 45 45 LI 45 25 45 20 LI 45 20 70 20 SA 45 45 SA 70 20 MC 75 30 1 0 074 MC 75 60 1 0 074 MC 45 30 1 0 074 LI 45 30 45 25 LI 75 30 75 25 LI 75 60 75 55 MC 40 50 0 0 074 LI 40 50 35 50 TY 80 30 5 3 0 0 0 * Ic TY 80 60 5 3 0 0 0 * Ie TY 40 55 5 3 0 0 0 * Ib TY 15 25 5 3 0 0 0 * (M-1)*Ic TY 30 70 5 3 0 0 0 * Fig.1commento a fig.1 This circuit serves as a model to implement the avalanche breakdown of a bipolar transistor using Spice2. A multiplication factor (M) is included to control the increase in collector current at or near avalanche breakdown.
fig.2 (disegno formato fidocad)
[FIDOCAD ] MC 55 45 0 0 300 LI 70 55 70 70 LI 55 45 30 45 SA 70 70 TY 75 70 5 3 0 0 0 * E SA 45 45 MC 75 60 1 0 074 LI 75 60 75 55 TY 80 60 5 3 0 0 0 * Ie TY 30 70 5 3 0 0 0 * Fig.2 LI 45 5 70 5 LI 45 20 45 15 EV 40 30 50 40 MC 45 35 3 0 074 LI 45 45 45 40 LI 45 30 45 25 LI 45 15 45 5 SA 15 45 TY 15 40 5 3 0 0 0 * B MC 20 45 0 0 080 LI 15 45 20 45 EV 75 30 65 20 MC 70 25 3 0 074 LI 70 35 70 25 LI 70 20 70 10 LI 70 10 70 5 LI 45 35 45 40 LI 30 50 25 50 MC 30 50 0 0 074 TY 25 55 5 3 0 0 0 * Ib TY 25 35 5 3 0 0 0 * Rb MC 70 0 3 0 080 LI 70 5 70 0 LI 70 -10 70 -15 SA 70 -15 SA 70 5 TY 75 -20 5 3 0 0 0 * C MC 80 25 1 0 074 LI 80 25 80 20 LI 80 20 80 15 TY 85 20 5 3 0 0 0 * Ic TY 75 -5 5 3 0 0 0 * Rc TY 60 15 5 3 0 0 0 * V2 TY 50 30 5 3 0 0 0 * V1 EV 40 10 50 20 MC 45 15 1 0 074 LI 45 25 45 20 MC 55 0 2 0 074 LI 55 0 60 0 TY 55 -5 5 3 0 0 0 * If TY 65 -20 5 3 0 0 0 * 6 TY 60 70 5 3 0 0 0 * 33 SA 45 25 TY 40 20 5 3 0 0 0 * 4 TY 75 5 5 3 0 0 0 * 66 TY 45 45 5 3 0 0 0 * 2 TY 10 50 5 3 0 0 0 * 22 SA 70 35 TY 75 35 5 3 0 0 0 * 1 TY 35 5 5 3 0 0 0 * F1 LI 110 25 110 20 LI 110 20 110 10 EV 105 15 115 25 MC 110 20 1 0 074 TY 100 10 5 3 0 0 0 * G1 EV 125 15 135 25 LI 110 10 130 10 LI 130 10 130 15 LI 130 25 130 35 LI 130 35 110 35 LI 110 40 110 35 LI 110 30 110 25 SA 110 35 LI 110 35 110 30 MC 110 45 0 0 040 LI 110 40 110 45 MC 130 20 3 0 074 LI 130 20 130 25 TY 105 30 5 3 0 0 0 * 0 SA 110 10 TY 105 0 5 3 0 0 0 * 3 TY 120 25 5 3 0 0 0 * V3 MC 140 25 1 0 074 LI 140 25 140 15 TY 140 10 5 3 0 0 0 * I=(Vcb/Va)^Ncommento a fig.2 The original model is replaced by an equivalent circuit with a current-controlled current source (F) and a voltage-controlled current source (G). Three voltage sources V1,V2,V3 are added to control F.
Stefano