What's Your Favorite Processor on an FPGA?

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What the hell is wrong with PARALLEL? You get the _whole_ byte/word/whatever each possible I/O cycle and do not have to wait 20+ cycles for preamble bits, 16 data bits, stop bits (maybe more for stupid "framing" because designer was too lazy to enforce assumptions that would speed things up).

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Just give me his feather headband..

This week's project is to learn all about synchros, resolvers, control transformers, and the many other related critters, and to figure out the conventions, voltages, phases, and the trig for acquiring and simulating all of that stuff.

I did win a burger and a beer. I guessed that the GCC atan2 function would take about 10 us on our ARM processor, and Rob bet it would take one. He wanted to bet based on 5.5 as the cut point, but I suggested that the geometric mean was more fair. Ok, it takes just about 4 us, so I won by about 800 ns. Now he wants to hack the source code to eliminate some paths we don't need, like the checks for infinity and NAN and such, and speed it up. That would be a lot of work for a burger and a beer.

And I'm about to learn a lot about kilowatt bar lasers, preferably without losing any important body parts.

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Yet the PDP-11s have all been scrapped. I scrapped a lot of them in the early '90s. Tractor trailer loads of off lease CAD systems.

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Sure. There's not a lot of demand for fractional-mips computers with kilobyte core memories. Lots of Univacs, Crays, GE, and IBM PC-XT computers have been scrapped too.

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Ask Intel.

Dell still sells a bunch of expensive PCI-X cards, and they are quick to drop items like that if the market drops. Some of the cards are $1800.

A lot of external drive arrays for server farms use Fiber Channel PCI-X interface cards.

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Yeah, for the PDP-11, designing specialized interface boards and programming for them was very nice and straight-forward.

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The real problem with parallel channels is that the length (propagation delay) of each channel must be the same.

In the 1970's with 1/2 inch magnetic tapes, the 1600 BPI tapes were much easier to read, since each channel was self-clocked.

However, in order to read 800 BPI (non-self-clocked) tapes written on a foreign tape drive, you had to use a screw driver to adjust the read head azimuth angle, to compensate for the skew at different bit channels.

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The 11 had no i/o instructions, which was cool. Devices were memory mapped, so no opcodes were wasted on klunky IN and OUT instructions, and any memory opcode could operate on i/o, too. 68K worked like that, too. The 68K was just a better PDP-11.

The PDP-11 was programmed in octal, and with a little practice you could assemble instruction in your head and map them directly into octal. I can still do some.

MOVB (r1)+, R5 is (I think) 112105 octal.

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The last time I tried to ask Intel anything [1], they insisted that I be certified first. That involved furnishing all sorts of company info and presenting a plan that proved we would build at least 10K systems the first year. All that to get a datasheet!

Go ARM!

Actually there is a huge demand for such processors, and smaller. Do you wear a digital watch? What's in your microwave, your TV remote, ect... DEC's problem was they didn't know how to package.

BTW, learn to trim your posts...

You just can't learn to trim your posts, no matter what. Did you ever see the movie Memento? Maybe we need to get you a tattoo?

I bet if you reply to this post it is trimmed. lol

--

Rick

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with IO instructions you don't need to do a whole lot of address decoding for if you need a few IO registers, you can easily make io a different speed than memory, if the opcode aren't used for anything else they are not wasted

And nothing prevents you from memory mapping devices instead of using the IO instructions

-Lasse

The PDP-11 allocated 8 KiB for the I/O page. This was of course much if you only had 64 KiB address space (no MMU), not so bad with 256 KiB logical address space (such as PDP11/34) and insignificant in the 4 MiB address space (such as PDP11/70).

With 8 KiB I/O page, it was not a problem to allocate register space for a large number of Unibus/QBUS cards, each peripheral register could have its own address in the I/O page.

Compare this to some processors with specialized I/O instructions with perhaps up to 256 I/O-registers. This caused some nasty consequences, there might be only two bytes on a peripheral card, first you write a register number select to select the actual register and then use the other byte for the actual data transfer to the recently selected register.

The IN instruction might read from one register, but OUT to the same address would cause writing a completely different register, i.e. no register readbacks.

Some exotic cards might have some nasty side effects of the IN instruction (e.g. advancing the register select) and you could not safely use some diagnostics tools to peeking such registers.

The dual operator instruction format was 1+3+(3+3)+(3+3) bits and most single operation instructions 1+9+(3+3) bits, thus it was quite easy to write small test programs directly with the binary front page switches. Of course, calculating the relative branch offsets in your head was a challenge :-).

It is interesting to note that the Intel 8080 had the MOV instruction in the 2+3+3 bit format and most other instructions in the 5+3 bit format. In some early documents, Intel used octal, which worked fine for this instruction mapping. Unfortunately, Intel then switched to hexadecimal notation and it became quite hard to program it in machine language.

Yet you asked me what they newest chips support.

Based on the number of boards in use, VME/VXI is obsolete.

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Ah. Now i get it. That is why HP wanted Compaq.

?-)

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Same old management problem. Even though the Alpha ran rings around Vaxes and PDP10s, and those were the current cash cows. They crippled Alphas to keep their old "core" business. That decision destroyed them. See also the Rainbow. IBM has barely survived similar mistakes with the PC. Also where is Data General (who had the Nova mini and the Micronova chip), Sequent, Sierra, Nixdorf, Pyramid, Non-stop computing, and many other minicomputer (and transaction server) vendors of the time. All gone or morphed into something else. Sun was the last one standing and they focused on engineering workstations. SGI Iris workstations are gone as well. Mentor and Daisy have morphed into software companies.

?-)

the

Absolute idiotic poppycock. Neither CPM nor Portland Software's 8086 DOS had anything but some incidental common commands to RT11. They were utterly different creatures written from scratch.

Focal.

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In 1975 i had a AN/UYK-7 which was about equivalent to a small VAX of the time. It was designed as a dedicated real time military sensor and weapons control platform (NTDS), the precursor of C3I. It did about 1

?-)