What exactly does this mean? (pcb fab)

"Hi Jon, In bottom layer, whether it is lack of soldermask pad? Pls check the attached picture. Thanks."

She keeps asking me these things and giving me pictures like

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A Soldermask pad is a "pad" that is meant to mask out the solder mask(so it is "bare" copper or board)?

I included the gerber files with the solder masks for top and bottom so I'm not sure why she is asking these questions. All the vias are masked except for a few. (5 on bottom for a dip like header)

Gerber masks show exactly what I want. Is there any reason why she is asking these questions? Is it od why I am puting a solder mask over them them? I do not want to have any accidental/potential electrical connection with them, which is the reason I am having a mask on all vias except for a few test points I need. All the smt pads, of course, can't have solder resist.

For example, on my board I have, at the end, a 5 pin dip header used to connect to external prepherials. The bottom solder mask gerber only has pads for those 5 vias since I do not want solder resist on them(since I need to solder wires to them).

The top board is more complex because of all the smts but almost all the vias need resist. (hence no pads)

But as I understand what is going on, i.e., the solder mask layers is simply the places where resist will not be put. A "pad" or positive region on the solder mask layer means that no solder resist will be put on that spot. I have checked the solder resist layers and they are exactly what I want.

Reply to
Jon Slaughter
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Then just reply:- ' solder mask layers are correct as supplied, pls use'. + Thank-you for noting my possible errors, but they are correct as I want them.

Reply to
TTman

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Ok, thats what I did and she said ok. (I sent a pdf of the gerber file images saying which is top, which is bottom and how it should look).

Do you know why she would believe it was an error?

Reply to
Jon Slaughter

In this image she has highlighted several floating ground fill areas. It is better to remove isolated areas of ground fill that do not have a via linking them to the main ground plane as they can sometimes worsen emc performance or cause difficulties in rf circuits.

They were almost certainly flagged by the manufacturer's design rule checking.

(It there is a large area of ground fill it is a very good idea to use multiple vias distributed over its area to link it to the ground plane as this minimises resonance effects at high frequencies.)

John

Reply to
John Walliker

In other words, "MIL-TFD"

--
"Electricity is of two kinds, positive and negative. The difference
is, I presume, that one comes a little more expensive, but is more
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Reply to
Fred Abse

I guess what she means by "soldermask pad" is "unmasked area".

Looking at the pictures, the marked "pads" appear to be vias.

It's up to you whether you want vias to take solder, or not. I guess, in this case, from the way you drew it, you don't.

--
"Electricity is of two kinds, positive and negative. The difference
is, I presume, that one comes a little more expensive, but is more
 Click to see the full signature
Reply to
Fred Abse

Ok, thats what I did and she said ok. (I sent a pdf of the gerber file images saying which is top, which is bottom and how it should look).

Do you know why she would believe it was an error?

Because she is doing her job, and yours is probably a bit removed from the run of the mill... PcbCart.com front end usually find all my 'goofs', for which I am very grateful :)

Reply to
TTman

Because in the first picture, it is possible for solder to bridge between a via and the trace next to it. The solder mask is "not quite right" although you are OK with it.

Personally, I would try to figure out why my CAD software was creating the solder mask layer like that.

Reply to
Gary Peek

Those ground traces *do* have vias connecting them to ground.

Actually with the 2 pictures you can see the problem. The first, the bottom layer(green one), shows the long traces on it. The top shows what I'm doing to connect the ground across those traces. The large dots on the green one is the vias that are the large holes in the red pic. It would have been much easier to use 4 layers with 2 internal power planes but I wanted to reduce costs and felt that it was not necessary for the application to use 4 layers.

I have a 2 layer board. The bottom layer is the ground plane as there are only a few traces. Those traces divide up the plane into parts though so used some vias(you see in 2nd picture) to "bridge" the ground plane over. Probably not necessary but it might help reduce ground impedance if it ever is a problem. (the problem is slightly more complex but that is the idea)

Reply to
Jon Slaughter

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I don't mind the questions since if I did make a stupid mistake it would be nice for it to be caught before production. But asking about solder resist seems kinda basic? Specially since, I'd imagine, most EDA do not automatically tent vias and pads. Hence one has to intentionally tent them and therefore if they are tented then they are most likely meant to be.

Reply to
Jon Slaughter

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Alright. Main thing I was confused on was her question. She was just asking but I didn't know quite what she was asking. I'm pretty comfortable with what she wanted and as long as she understands that the gerber solder mask layers says exactly what I want then everything is fine.

Reply to
Jon Slaughter

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Evidently she thinks your vias look like pads. A component ID layer might help her to tell the difference. Better still, fill your vias.

-- Joe

Reply to
J.A. Legris

I see floating copper islands which can be flagged as an error since it is unconnected copper.

I also see what may be plate thru holes that are too close together and their solder masks overlap. If those are just vias, there doesn't need to be a hole in the mask for them.

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Reply to
MooseFET

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Floating copper islands? Where? You mean the from the copper pour? Obviously there will be spots that are not connectable. It is no big deal since I'd rather have the copper there than not.

In the first picture(green one) the very right large ellipse. you mean those unconnected copper regions? Thats fine... it's not mean to be connected. It's just from a copper pour and that had a rather large gap between the traces. I could have fixed it by making the traces tighter and more uniform together but it's not a big deal.

I don't know what your talking about ;/ If there solder masks overlap then what harm can that cause?

Reply to
Jon Slaughter

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pads as in copper disks without holes? I hope not!! all my vias are suppose to have holes in them or the board is useless. The holes come from the NC drill layer I sent. In the second pic(red one) it's obvious she has layered the NC drill file with the top layer since those blue dots are holes. The green one I'm not sure about. All those brownish colored dots look like pads but are suppose to be vias. I guess she simply didn't add the NC drill overlay like the first.

Reply to
Jon Slaughter

How can it bridge when there will be a solder resist all over it?

I don't really know what you mean... Solder mask layer like what? It makes perfect sense to me when I view the gerbers. The solder mask layers show "color" where I do not want the solder resist(conformal coating or whatever). They show it in all the places I expect. The drill file contains all the holes for all the vias exactly where I expect(I shows a dot at the location where a hole should be drilled).

Reply to
Jon Slaughter

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Ok guys, I think I know the problem. Since I tented the vias but I didn't make any note(simply didn't think about it... I guess I thought it would automatically be noted in the gerbers or drill file or somewhere).

Could that be the issue? I guess they won't be tented when I get the board back... well, not a big deal but i guess that could screw with the solder resist on the vias.

Reply to
Jon Slaughter

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I think she understands that the holes are there, but she thinks your vias look like either through-hole pads, or should be filled with solder, and therefore should have corresponding openings ("pads") in the solder mask.

-- Joe

Reply to
J.A. Legris

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You may consider it not important but one of the checks that is commonly done. I always either remove them or connect them. It is perhaps like throwing a cat over my shoulder but I think it is a good idea.

You could also spread the traces to let the copper run between them.

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If you put to points that are going to be soldered so close that the masks overlap, you run a greater risk of a short.

Reply to
MooseFET

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Well, of course I'd prefer to have them connected but because of clearance reasons they were created. The copper pour was created automatically where it simply fills in areas that are larger than a given amount(which can be quite small) regardless if they can be connected. One does have the ability to remove dead copper. I prefer to keep it "alive" since it adds to the "weight" of the board and looks more consistent IMO. I can fix it though. The traces were generated by a script I created and I have to set the "tolerance" which is basically the corner amount. I might change it in the future but it didn't seem to be that big a deal at the time.

Although it is an easy fix... can you give me any compelling reason (hopefully to do with electronics) why I should change it? (this is an honest question)

Yes, or just make them tighter which is easier because those traces are script generated(rather by hand) and I can just modify a parameter or two that will fix that(it can add more or less but I prefer less than more).

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Ok, I see what you mean. That always is a problem such as with tight pitch components. I think the only problem I'm going to have is with the tight pitch components. All vias have resist and will not have any solder so no solder bridging can occur... or at least that's the idea.

Reply to
Jon Slaughter

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