VCO basics

Can you provide links? I can't even find a data sheet.

...Jim Thompson

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|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
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I love to cook with wine.      Sometimes I even put it in the food.

ICS used to be very good before IDT took them over. It was easy to contact people that REALLY knew the product. Good luck, now.

It can be very important to keep the VCO's supply super clean. It's difficult to know what a given part's supply rejection is, so I always include extra filtering.

The LT1963 is a superb low-noise LDO. It's one of the ones that Xilinx recommends for their FPGA serdes supplies. It may be overkill, however.

I've had good luck, with sensitive ICS (pll-based) clock multipliers chips, by simply using a resistor between the supply and the chip and a parallel cap (chip side to gnd, of course). You have to keep the R small enough so as not to violate the chip's VDD min, and keep the C large enough to keep the noise low at low frequencies. Be sure to add smaller parallel caps so the noise filtering is effective even at the higher frequencies (hundreds of MHzs).

We had one design that used an ICS8xxxx part. Its output jitter was terrible (way over spec) even though we used a series ferrite bead and small parallel cap. We pulled out the ferrite bead and replaced it with a 4.7ohm R, and we increased the cap (10uF iirc). It solved the problem.

Bob

Argh, typo. AV9173-01

http://www.ortodoxism.ro/datasheets/icst/AV9173-01CN08.pdf

Looks like ICS/IDT is dropping this guy. It's being replaced with the MK9173...

I wonder why they link to VCXO app notes for a VCO based chip?

Thanks Bob, I was starting to think I was losing it. The data sheet calls out twice to read AB01 if I'm using Hsync below 25KHz... can't find AB01.

This is for a hobby project, so I just sort of tossed things that looked good together. I can recover my dot clock, but my initial measurements with my sampling scope show me some pretty poor jitter performance. I mean I can see on my target LCD monitor the pixels flashing on and off as the scan doubler's setup and hold time is violated, the scope just brings it home.

I'm gonna cut and jump a heavy ferrite/RLC filter on the power supply. Good thing I have a quiet analog scope otherwise I'd never see that 5mV pp noise on the supply.

Regulators are good for rejecting low frequency supply noise but not so good at high frequency, as Bob said a resistor followed by a capacitor or 2 is often a good idea, ferrite beads work at high frequency but you may find dont work at the frequency you want, choose R just high enough so it only cuases a slight v drop.

The ground and control voltage are important of course, you need to isolate any ground noise that will superimpose itself on the control voltage, ie make sure there is absolutly no digital ground currents flowing between the trace conecting vco gnd and PLL gnd or whatever generates the control.

Colin =^.^=

Do you really need a 7.5 to one VCO range?

I am assuming the VCO runs in a phase locked loop. So the stability of the supply is not very important for frequencies well below the phase detector sampling frequency, since the negative feedback will correct errors that are changing slowly. I would first try an LC supply filter for the phase detector and oscillator.

Do you really need that much range in the VCO? If not, then use a different chip. The lowest noise VCOs just "pull" a crystal or LC tank.

BTW, IDT was easily the worse place I ever worked. Len Perham rose to the top by the vacuum principle, i.e. someone either died or quit, and he got sucked up into the next level. Before you knew it, has was CEO. It's been some time since he was gone, but it looks like it was too late to fix the mess he left.

It's a genlock chip that has 1x and 2x outputs that covers my frequency of interest. There aren't many. Some have pre-set internal dividers that I'd have to bypass anyways. Since the divider is 1016, the feedback happens slowly enough that all kinds of stuff can happen in the meantime. There are other, newer video dot clock generators that cover even higher ranges, it's worse. I'm gonna go to a VCXO for the next version...

I'm on my 4th week of sending out emails to get this AB01, still no reply.

I'll take everything I can get. I've seen VCOs have their own local boost converter followed by a reference chip (!) for power. Something like 5 to 6V, followed by a REF195 padded with tons of caps and ferrites. But that was for high speed serdes stuff, where jitter is measured in picoseconds.

I'll take everything I can get. A ferrite with 1000ohms at 100MHz is 9 cents, that still buys me 20dB attenuation at 20MHz. Thing with the RC filter is that the 7805 is kind of sloppy in its output specs, mine is running at 4.9V. Toss in the RI loss and I might create more problems than I solve. If I release my project for others to build, I can't control the voltage the regulator outputs. Maybe it's time to spec another regulator for the board.

I'm also a bit miffed that I placed the regulator as far away as possible from the genlock chip... Means the 5V that reaches the chip has all the noise of the scan converter, microcontroller, and input buffer, all 5 mV of it.

The phase detector, filter and VCO are in the same chip. The divider is external. The genlock chip is about 200 mils away from the clock inputs on the main chip. There's little else on the board. No currents except the return current flows underneath. (knock on wood)

Whatever the filter is, if it's working with noisy digital signals from the phase comp, that's probably the real problem. Maybe I can schmitt the inputs too.

5mV

good

idea,

isolate

the

Well it wouldnt hurt to use a regulator ferrite bead and resistor, The noise you realy need to worry about is that wich is above your pll filter bandwidth, If this is about 100khz then a ferrite bead isnt going to cut it and a regulator might just let this through, however you could put a rc filter before the regulator this will solve both problems.

Colin =^.^=

Nope, but the other genlocks have even wider ranges. I don't know what LCD monitors use to recover the clock on the VGA side but they have to use something similar to what I'm doing, so it's possible.

When I get my 10Hz - 1MHz spec an working I'll poke around the supply more but I will add the 1$ of parts to try to clean up the genlock's supply first.

Was it during that period that IDT performed such bone-headed manuevers such as purchasing Quality Semiconductor and -- within months -- discontinuing a bunch of their products that were better than what IDT themselves offered? How naive...

I would say that I've used plenty of IDT FIFOs and multi-port RAMs and have always been happy with them.

I was at IDT in the late 80's. The Quality buy out was a decade later. Cheun Der Lien is the only name I now recognize when I look at their website.

Nothing wrong with the bread and butter IDT parts (FIFOs), though they fell behind on processing yield and speed due to not taking care of the talent. Of course, not taking care of the talent is the classic way Silicon Valley companies self destruct.

VXCO is the way to go for stability, but they are slow to lock. There is also a slight microphonic issue.

Could you offer some hints as to how to select a pullable crystal at

32MHz? I think crystals over 27MHz are 3rd overtone, perhaps I'm out of date? It is my understanding that a 3rd overtone crystal is 3 times less pullable. Or is it 9? Are there perhaps resonators that can be used in this role? I think a resonator's Q would be still be higher than the apparent Q of a wideband VCO.

I did some research on this kind of project years ago, but never built the hardware. {cancelled project.] From memory (so use this in research rather than accept it to be gospel), there are two basic ways to pull a crystal. One is with a varactor, much like you would use if tuning the osc by hand. The other is a more integrated approach used in a Philips chip. I'm drawing a blank on how they did it, but no varactor was required. However, if you building a board level product, I don't see an issue with a varactor. There are a few that are dirt cheap since they are used in AM/FM radios.

My recollection is you can only pull a crystall about 1000ppm. Remember the low jitter is related to the high-Q, which in turn means it takes a long time to move the frequency.

There is an old book on crystal oscillators by a guy named Ferking. I recall using a copy from Stanford. I dug this up on Amazon:

----------- "... co and go to application notes. Ferking M. E. (1978): Cristal Oscillator Design and Temperature Compensation, New York: Van Nostrand Reinhold. Hambley A. R. (1994): Electronics. ..

--------------

For something on crystals, a 1978 reference is actually pretty recent. ;-) I'm not sure if the 1994 reference is to a more recent book.

The other source I found was from the Swiss Federal Institute, though the author doesn't come to mind.

This is the company that at the time I did the research had the lowest "noise" crystals:

You could always use a DDC, they are a bit expensive though, and use a fair amount of power.

If im not mistaken pulling a crystal can be done as quickly as you want, the rate of pulling is not limited by the Q of the crystal just the extent.

Once the energy is built up in the circuit it is bound to oscillate at the resonant frequency. But its not something ive looked into.

A ceramic resonator however makes a pretty good VCO.

Colin =^.^=

If you are not using a fixed overtone crystal oscillator 32 MHz should be a frequency lying between the resonant and antiresonant frequency of the crystal. You would have to add a capacitor in series(assuming the crystal is looking into a low impedance load in the VCXO circuit) to make it pullable. That will only raise the frequency. An inductor in series will change that. Or you can add a phase lag around the oscillator circuit to lower the frequency, best if you are interested in setting your oscillator to a fixed frequency. An LC selector tank substituting one of the capacitors in the typical capacitor stack (of your VCXO) fed into your amplifying unit should fix that. At low frequencies, this circuit appears inductive, while above resonance,its capacitance dominates. By setting the resonant frequency to bemidway between the highest unwanted overtone and the next desiredovertone, C and L will be of opposite sign at all lower-frequencyunwanted overtones, but of the same sign (capacitive reactance) at the desired overtone above the selector resonant frequency.

Yes ... bout 20MHz right up to 60MHz then 5th overtone take over, though above 50MHz you would need to add a shunt inductance to make the crystal resonate. As at such frequencies the parallel motional capacitance shorts out the series motional inductance and capacitance in the crystal.

From what I heart the pullability is limited by about 0.15% the Crystal's fundamental frequency, though units specifically designed to resonate at an overtone frequency resist being pulled at that frequency but have good frequency variability at their fundamental value.

That shouldn't be your worry ... by varying the external capacitance as I suggested above should fix things if you are using a crystal not resonating at a given overtone frequency.

lemonjuice

A few companies make fundamental crystals to 125 MHz. We used them at Microdyne. They were in welded metal TO-5 cans, and custom made.

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