up to 8

How about reducing the power instead? Also add more memory busses to help the memory bandwidth keep up with the CPU core count. How about going more towards a static design, so that they can be slowed down when idle some more. Except for video rendering and heavy simulation the dang chips are just pissing away power most of the time. Of course a lot of what they are selling as is bragging rights, not more usable processing power.

Highly multicore chips will switch off the power to unused cores. When I was at IBM (I still have two weeks to go, but it feels like ancient history already), the general wisdom was that turning cores on and off to manage power was one of the great strengths of the multicore approach.

Cheers

Phil Hobbs

I'm currently designing a _large_ multi-function chip. Virtually every cell on the chip is powered up only when used. Battery-powered, obviously.

...Jim Thompson

There are many reasons for not going with static designs, primarily performance/power. Dynamic logic is a lot faster at the same power and even stopping a bleeding edge CMOS processor doesn't save much power because leakage is so bad. Since cores have to be completely powered down to save significant power, why pay the penalty for static logic?

IP_ADDRESS on port 1234:

netcat on both sides.

program to port 1235.

that should be possible.

from for example a webcam,

Thanks! I've been looking at ffmpeg as the obvious (free) choice for transcoding.

transport stream:

OK.

About the only major consumer app that will need all the CPU power it can get is gaming. I recall being a a conference on multiprocessor machines (circa 1977) where I got strange looks from fellow delegates when I stuck my neck out and said that the big driving force would be games needing more than 64K of memory!