Unconnected part LTSpice seems to need (weird ...)

as a

That's in the setups. If you're using pre-made parts, you live by LTspice and die by LTspice ;-)

I often simply short out parts or cut them loose and tie all ports to ground.

It now seems suddenly hot for technologists... than God! ...Jim Thompson

it

Well, yeah, but I often need to do quick sims. 1-2h, maybe 3h. So I can't spend a lot of time making library parts.

It sure is. But I was surprised by the deals they cut you these days when you need boards made.

Still? Whereabouts?

When you reach Lake Montauk stomp on the brakes prontissimo or it'll get wet :-)

Hi Joerg, Yes, it looks like you have hit another of those 'interesting assumptions' that always come up and bite us on the posterior.

Spice has to have everything connected Somewhere, and have a path to ground from that connection. In the real world, you can have things that go nowhere, and there is no problem. Some spice progs will just give you an error message and say "Where is this supposed to connect, dummy?" while others, like you have run into, try to help out and assume you have a floating node, and it should connect to ground through a high value reisistance. I am afraid it is just a part of learning the capabilities of the tools... 8-)

Charlie

Lets get all the terms correct...

It is connecting to ground via a resistance of 1/gmin, i.e. the highest value resistor that it can model.

Charlie

Some of us _can_ think in terms of conductance ;-) ...Jim Thompson

disclose

Just a really off the wall idea, is it possible for a no-connect to be read as a connection to ground (node 0)?

??-\

Yup. But to be more precise, gmin is an additional conductance set *across* every junction, while the additional path to ground if set by rshunt (or gshunt in LTspice).

-- Thanks, Fred.

disclose

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Is someone of crazy here (very possibly me, i have not done an actual IC design)? How can you dare try tapeout before having a believable simulation? Can't you get adequate device models without tapeout? Do they even know which fab and process they are going to use?

disclose

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I can totally understand being uneasy committing to an IC design with a sim that i could not trust.

?-/

That _may_ be true in LTspice, but in all Berkeley-compliant Spice's, every node has a resistor of value 1/gmin to GROUND. ...Jim Thompson

I don't know that I'd trust LTspice for an I/C design. Too many gimmicks built-in to speed up simulation. It is, after all, tailored to running commercial LTC products. ...Jim Thompson

Why? Why can't it just do the only correct thing and pretend a diode with one side disconnected is no longer part of the netlist? That's not hard to implement.

Or the tools should learn to follow breadboarding strategies more closely :-)

I have a solution in situations like that: Weller WES51 :-)

The IC is completely simulated out on the big Mentor simulator, not LTSpice It's about the system interface, not the IC.

Oh yes, they do and I do :-)

When you do an IC of this complexity you tailor it to a specific process right from the beginning.

So all standoffs should be 22 meg?

Cheers

Phil Hobbs

No, no, this implies the kludgy kind of experimenting. No standoffs. Wire cutters ... snip ... pinggggg ... oh, looks bad, we need this, got to solder it back on ... bend it down ... apply liberal gob of solder.

Dead bug Muntzing!

Cheers

Phil Hobbs

Or as Antoine de Saint Exupéry might say, "Il semble que la perfection soit atteinte non quand il n'y a plus rien à ajouter, mais quand il n'y a plus rien à retrancher".

(perfection is attained not when there is no longer anything to add, but when there is no longer anything to take away )

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My point was that when a mathematical model blows up (gives unphysical results or just crashes), it indicates the model does not accurately "model" reality and a "reality check" is in order.

I was wondering here about whether LTSpice can accurately model a diode acting as an antenna the way they actually do.

Mark L. Fergerson