Ultra-low power switching boost converter - in a DIP

not really any different, it's just that the idea of a small package is somewhat lost if the area you gain is just lost in routing and vias

-Lasse

Reply to
Lasse Langwadt Christensen
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Yes, to some extent. But real estate can be reclaimed by using smaller PCB features and adding layers. In some cases, size is more important that cost, so it's ok to transfer some cost to the PCB even if it ends up being more in total.

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Rick C
Reply to
rickman

Right, and the lead lengths plus pad toe length, plus tolerances, takes up a good 4mm or so around it.

You can use that for routing instead.

I kind of suspect QFPs are easier to route anyway, as there's no pad in the middle (usually) that ties up all layers, grounding it. You have very little room to do that under a QFN, so you end up using the pin+pad area for routing instead.

As Lasse noted, I mean the pinout of GPIO ports and buses.

Even SCK, MISO and MOSI end up jumbled! How the hell?

One plus about ATmegas is their pinouts are always nice.

Tim

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Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

Bullshit. They're completely different packages.

Reply to
krw

QFNs have pads and toe lengths and tolerances as well. I believe the difference ends up being 2 mm which is the extent of the leads on the QFP. So for smaller devices this can be appreciable but much less an issue with larger packages like a 48 or 64 pin device.

Or worse. My typical designs have very limited space and the loss of room for vias is a problem with QFNs. I like them, but mostly for smaller parts like 20 pin parts. I like BGAs a lot less. Mostly they require finer pitch lines and spaces as well as micro vias driving up the cost of the PCB.

I've never found a problem with that. Buses are a bit dated unless you are designing with external memory, not my typical design. Otherwise I find I can assign the I/O to suit my board routing. Heck, when I design with FPGAs, I do a schematic and then redo the pinout to optimize my board routing. Some designs just would not fit on the board if I didn't, at least not without more layers.

How can you care about routing three signals? What would you expect for a pinout?

I use FPGAs a lot more than micros. FPGAs will do anything a typical MCU will do, but not the converse. MCUs are useful if you need a lot of complex software to do the job. It would be hard to implement an IP stack in VHDL... unless you implement a CPU which I have done. Sometimes it's just easier to include it in the FPGA than to add another device and programming port and crystal and...

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Rick C
Reply to
rickman

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