Unfortunately the critical dV/dT required for turn on isn't a very well defined parameter. It varies significantly depending upon junction temperature, gate drive impedance, and also surely to some extent from device to device and the waveform/duration of the high dV/dT event. Using a high impedance gate drive will significantly reduce the critical dV/dT, or inversely, if you short the gate to MT1 with a low inductance/resistance path during off state you will get the best dV/dT ability.
Given the ambiguity I don't think I'd risk it for a commercial or industrial design, I think I would find a different approach.
circuitry shown below. The input frequency is typically
TRIAC , and setting the frequency so about 200mA
1ms, and the TRIAC is then allowed to turn off.
voltage across the lamp to start the arc. Once started
ballast.
causing it false trigger during lamp operation or
250V/uS (type). Strangely the TRIAC does not seem to
Between the rating being conservative, device variation, and your choice of temperature at which to do this test, there is no need for surprise as this result.
an unloaded series LC then the voltage across the
600V/uS across the TRIAC, yet still did not turn
instantly, but if the 140kHz voltage is ramped to 700Vpk
story than just an off state dV/dT rating ?
Yes, there certainly is. That rating likely applies during "commutation", when the carrier distribution differs from what occurs during your testing.
By the way, (if I were you), I would be sure to take a look at the dI/dt of your circuit. You might find you are abusing the poor triacs.
And be sure to look at several datasheets unless it's a hobby project or your employer craves to get into vanishing-sole-source pickles. Several manufactures make such a part and they are not likely to have the same specs or margins.
--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
Probably, as would other low impedances. (From the OP's diagram, they gate might already be kept at low impedance, or not.)
That's not a bad mental model, but the capacitance in question is not reachable from the gate without some impairment by lateral resistance. This limits what you can achieve with external shunting.
--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
triangle wave at 100kHz, or 0.17A/uS which is about 300
The dI/dt you need to worry about is not the current that occurs while the device has been conducting for awhile. The issue is dI/dt during the transition from the off state to the fully conducting state. It takes time for the conduction process to spread from the metalized portions of the gate region across the whole junction set. During that time, current density can be much higher than after conduction is fully established. I look at the cap you have across the triac and see a potential for high dI/dt during switching. Maybe, if you turn on at triac voltage zero-cross, that is not a problem. But you should be ensuring that.
Sorry, but that's too grand a topic for me just now.
exceeding say 1000Vpk @ 120kHz sine wave across the
starting waveform is only 220Vpk 120kHz, then reduces
Let's hope some of the other hotshots here can go thru the whole question and answer series with you that would be necessary to address your concerns in a responsible fashion. I have used only a handful of 4-layer devices, and cannot make the judgment you appear to want off the cuff.
--
--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.
I'm building an electronic fluorescent lamp circuit with the basic lamp circuitry shown below. The input frequency is typically 100kHz during normal operation. The starting sequence begins by turning on the TRIAC , and setting the frequency so about 200mA flows through the filaments. Once heated the circuit is powered off for about 1ms, and the TRIAC is then allowed to turn off. Power is turned back on at the LC resonant frequency thereby producing high voltage across the lamp to start the arc. Once started the lamp reduces impedance and the circuit behaves like conventional inductor ballast.
I'm concerned about reaching maximum off state dV/dT ratings of the TRIAC and causing it false trigger during lamp operation or starting. The device I have tested is a BT134 with a rated off state dV/dT of
250V/uS (type). Strangely the TRIAC does not seem to trigger when exceeding the rated dV/dT. For example, if I temporary remove the lamp so the circuit effectively becomes an unloaded series LC then the voltage across the TRIAC was measured to be 700Vpk at 140kHz. This corresponds to a dV/dT of over 600V/uS across the TRIAC, yet still did not turn on. However, the TRIAC will sometimes trigger when the circuit is powered instantly, but if the 140kHz voltage is ramped to 700Vpk over a few milliseconds, then the TRIAC never triggers. Is there more to the story than just an off state dV/dT rating ?
instantly, but if the 140kHz voltage is ramped to 700Vpk
story than just an off state dV/dT rating ?
During filament heating period the on current is no more than a 300mApk triangle wave at 100kHz, or 0.17A/uS which is about 300 times below the rated dI/dT of most similar sized TRIACs.
Thanks for the tips, but what is a good safety margin to work with. For example, I may find that a bunch of TRIACs typically turn on when exceeding say 1000Vpk @ 120kHz sine wave across the terminals. Would it be safe to build the product given that the nominal lamp starting waveform is only 220Vpk 120kHz, then reduces to 140 Vpk during normal operation.
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