TI deadtime generator

It seems they took Win's circuit way too carelessly:

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According to the schematic, they use SN75LVC2G14 as the Schmitt trigger. The datasheet says V_T+ is 2.2--3.7V (@5.5V), while V_T- is 1.4--2.5V and deltaV_T is 0.7--1.4V. This would be good enough for *some* deadtime in the case of a Si part, but here they aim at precise 7ns for the GaN. How could they achieve good results over a wide temperature range in production, i.e. without individual tweaking the RC values? Spice says the deadtime will vary in the range of 4..8.5ns, not including the propagation delay. Including, it gives 5.5..12.8ns.

Is this based on some clever temperature self-compensation, or do they not care?

Best regards, Piotr

Version 4 SHEET 1 940 680 WIRE 480 -224 448 -224 WIRE 384 -208 320 -208 WIRE 480 -80 448 -80 WIRE 320 -64 320 -208 WIRE 384 -64 320 -64 WIRE 176 32 160 32 WIRE 272 32 240 32 WIRE 480 64 448 64 WIRE 160 80 160 32 WIRE 160 80 96 80 WIRE 272 80 272 32 WIRE 320 80 320 -64 WIRE 320 80 272 80 WIRE 384 80 320 80 WIRE 160 112 160 80 WIRE 176 112 160 112 WIRE 272 112 272 80 WIRE 272 112 256 112 WIRE 96 128 96 80 FLAG 96 208 0 FLAG 320 144 0 FLAG 480 64 LMG5200_INPUT_BUFFER FLAG 480 -80 TTL_LOWER_BOUND FLAG 480 -224 TTL_UPPER_BOUND SYMBOL voltage 96 112 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 5 0 10p 10p 500n 1u) SYMBOL schottky 240 16 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 -54 27 VTop 2 SYMATTR InstName D1 SYMATTR Value BAS40-04HM SYMATTR Description Diode SYMATTR Type diode SYMBOL res 272 96 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 47 SYMBOL cap 304 80 R0 SYMATTR InstName C1 SYMATTR Value 100p SYMBOL Digital\\schmitt 384 16 R0 WINDOW 3 6 -11 Left 2 SYMATTR InstName A1 SYMATTR Value Vhigh=5 Vt=1.86 Vh=0.2 Trise=10p Tfall=10p SYMBOL Digital\\schmitt 384 -128 R0 WINDOW 3 6 -11 Left 2 SYMATTR InstName A2 SYMATTR Value Vhigh=5 Vt=3.1 Vh=0.6 Trise=10p Tfall=10p SYMBOL Digital\\schmitt 384 -272 R0 WINDOW 3 6 -11 Left 2 SYMATTR InstName A3 SYMATTR Value Vhigh=5 Vt=1.8 Vh=0.4 Trise=10p Tfall=10p TEXT 62 232 Left 2 !.tran 10u

Reply to
Piotr Wyderski
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A follow-up question: there is no single instance of the name "Schmitt" in the LMG5200 datasheet. Figure 10 on page 10 also does not contain the corresponding symbol. BUT: Table 6.5 on page 5 specifies V_IH, V_IL and V_HYS: "Hysteresis between rising and falling threshold [400mV]". How can one have a hysteresis defined without having a Schmitt trigger of some ilk? They explicitly use the word "hysteresis", not deadband or something like that. The V_IH and V_IL levels are specified much tighter than in the case of SN75LVC2G14 as well (=> way smaller tempco delay dependence), so why then they use an external inverting buffer in the EVB instead of connecting the RCD network directly to LMG5200? Either they don't read their own datasheets or I misunderstand something.

Best regards, Piotr

Reply to
Piotr Wyderski

With such short added delay times, and considering the high gain of CMOS inverters at their threshold, it'd make more sense to simply use inverters. These actually have fairly-low propagation-delay tempcos.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

Is all that tilty stuff an attempt to make computer graphics look hand-drawn? It doesn't work. If he wants to draw, he should learn how.

In real life, cmos schmitts are a lot better than their worst-case specs.

--

John Larkin         Highland Technology, Inc 

lunatic fringe electronics
Reply to
jlarkin

Dunno, tell him.

Why not update the specs then?

Best regards, Piotr

Reply to
Piotr Wyderski

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t_PD in 20--51ns.

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t_PD in 1--12ns.

Best regards, Piotr

Reply to
Piotr Wyderski

Specs, smecks. Look at '04 specs, not '14. e.g., TI's 74AUC1G04, 0.5 to 1.6ns. That's more like it.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

The TI have just informed me that the input buffers are Schmitt, so the AoD RCD network is all what is needed. Would be a lot of fun to tune the introduced delay having the chip propagation delay and a 100MHz scope.

Best regards, Piotr

Reply to
Piotr Wyderski

Can you clarify?

--
 Thanks, 
    - Win
Reply to
Winfield Hill

I have been told by a TI employee that the driver within the LMG5200 is very similar to the standalone LMG1205 and, in particular, the inputs

*are* equipped with Schmitt triggers. The thresholds are specified in Table 6.5 and have much narrower tolerances than any available discrete CMOS logic buffers/inverters. So, in order to generate the necessary LI/HI deadtime, it is sufficient to connect an RCD network derived from the one described in your book directly to an input. This will do:

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but with the diode reversed for obvious reasons. Spice says 100p/150 Ohm, but it will need to be verified experimentally.

Best regards, Piotr

Reply to
Piotr Wyderski

Confirmed, disclosing it in case anybody plans to play around with the part. :-)

This H-bridge is incredibly fast per MOSFET standards, there is a good chance that it can wash away the shame of hard switching.

Best regards, Piotr

Reply to
Piotr Wyderski

Agreed. The argument against rail-rail conduction is, high rail-rail conduction. But if the time is very short, it may be better than the long-deadtime alternate, which allows conduction of the opposite FET's body diode at high currents. That can be worse, with its reverse-recovery-time snap-off.

--
 Thanks, 
    - Win
Reply to
Winfield Hill

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