Testing Mosfets in Parallel

Hmmm... 200 amps times 12 volts is, well, 24,000 watts.

John

Reply to
John Larkin
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Huh?

200 x 12 ----- 400 200 ----- 2400

Did we slip a decimal? ;-)

Thanks, Rich

Reply to
Rich Grise

It has been known to happen. Thanks

Reply to
EdV

You go, kid!

Reply to
kell

I suppose so. I don't check stuff I don't get paid for.

John

Reply to
John Larkin

Not even when the hint is, "I hope that was a typo?" I know how easy it is to miss a factor of 10, or 60 (like I did a few days ago) when doing a quick calculation in your head. But we have to practice and guard strongly against it. We need to trust our back-of-the-envelope calculations, otherwise they can rear up and bite us hard where it hurts really bad. For example in ruling out a superior approach when making a quick scratch-pad evaluation.

--
 Thanks,
    - Win
Reply to
Winfield Hill

...

Oh, but just ask any of our favorite trolls (you know who you are ;-) ), and they'll agree: Being Right is, itself, sufficient payoff! ;-P ;-P ;-P

Cheers! Rich

Reply to
Rich Grise

Geez, Win, it's only a newsgroup. It doesn't matter.

John

Reply to
John Larkin

Turns out I have my ego and my priorities invested elsewhere. And, as I said, I check my work when it matters.

I did make a modestly expensive *real* mistake recently: came up with a nifty (but fatally flawed) idea on how to do open-thermocouple detection without introducing temperature errors [1]. But I had help from another engineer and an impressively cryptic ADI datasheet. We'll have to spin the board.

John

[1] Most people just squirt some fraction of a uA of DC into the loop, and look for the input to rail if the t/c goes open. Around 200 nA seems to be common. But t/c wire is very resistive, an ohm or more per foot typically, so a 100' run makes a 20 uV error (did I get that one right?) which is a lot here. What I invented was a wigwag current, a square wave every adc half-cycle, along with algorithms to cleanly separate the resistance and the t/c signal. Fatally flawed, one reason being that the ADI delta-sigma, undocumented, always gives you the value averaged over last two sample intervals... bye bye square wave!
Reply to
John Larkin

Aha, some good news. For the supply use a largish car/truck battery. When i had to run 30A to 300A fast pulses < 1 mS to < 1 uS through some parts it was the only "source" stiff enough. If you can test using pulses you can easily use some constantan wire or ribbon to build the load resistors. If you need full time power dissipation you could build the load from ribbon and add a blower to keep the thermal rise down. Then you could use the measurement means of choice.

--
JosephKK
Gegen dummheit kampfen Die Gotter Selbst, vergebens.  
--Shiller
Reply to
Joseph2k

They may have directly paralleled all drains and sources, but at least they should have driven each gate via separate gate resistors. If so that is your possible entry point for testing.

Think about dropping the pcb onto a bed of nails, two nails per device, where you can selectively short the gate-source of 9 devices, leaving just one device active for measurement.

Have a 0-12V ADC into a linear gate-driver with several amps capability, (in order to drive those 9 shorted gate resistors). To avoid dissipation problems in those resistors, each active gate- -driving test must only last a few milliseconds.

An 8-bit ADC, clocked at 10KHz, will ramp from 0-12V in 26mS, with 50mV steps. Have a safety circuit that toggles the drive OFF if the gate drive is ON for too long (ADC stalled).

Use a 5V/10A dc supply, through a 0.5 ohm resistor to the commoned drains. May be useful to have a few selectable values of resistor.

Dual-beam scope needed, probing Vgs and Vds. An IEEE scope will enable data to be snatched off quickly.

Do three broad tests.

1) All devices OFF. Check that Vds = Vsupply. You may change the 0.5 ohm for a higher value for this test. This is the leakage current test. 2) Pulse 12V Vgs to one device, measure Vds at 10A. This is the ON resistance test. 3) Ramp the Vgs of one device 0-12V, plot Vds at the same time. This characterises Id versus Vgs, or gets Vgs(threshold).

It all hangs on whether they used separate gate resistors and what value.............

--
Tony Williams.
Reply to
Tony Williams

The usual, at least one, typo.....

~~~ DAC

~~~ DAC

--
Tony Williams.
Reply to
Tony Williams

Tony, I'm impressed, great solution, your brain has been working overtime. I hope it didn't become overheated!

As for performing this test when the resistors are low values, that simply means shorter-time pulse testing, higher drive currents in the test device, etc. The entire story and complexity shows the silliness of not re-visiting the PCB to add test features to the design.

--
 Thanks,
    - Win
Reply to
Winfield Hill

In article , Winfield Hill wrote: [snip]

It's my trade..... the sort of relatively routine belt and braces solution you have to devise for what looks like an 'impossible' test problem in ATE.... it is a lo-tech solution, easy to put together and get going.

Those burnt fingers, and bitemarks on your bum Win.

--
Tony Williams.
Reply to
Tony Williams

Reply to
Riscy

Riscy, Tell us more of your Flir thermal imaging camera. Type, cost and results. Thanks, Harry

Reply to
Harry Dellamano

Awwwh, now you've gone and hurt our feelings! Of course we matter!

--
 Thanks,
    - Win
Reply to
Winfield Hill

I can't think of one time that I've messed things up on a phone call and said "It's only a telephone. It doesn't matter".

;-)

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

I only know, for sure, that six members of this newsgroup, including myself, actually exist.

John

Reply to
John Larkin

which 6?

Cheers Terry

Reply to
Terry Given

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