I figured that I could bootstrap an LT Spice sample/hold to make a stairstep waveform.
Without the RC, the output jumps to +10 volts at the first clock edge. And the RC has to be right to get a proper stairstep.
Version 4 SHEET 1 880 680 WIRE 144 -128 32 -128 WIRE 240 -128 144 -128 WIRE 448 -128 320 -128 WIRE 144 -80 144 -128 WIRE 448 0 448 -128 WIRE 144 16 144 -16 WIRE 32 96 32 -128 WIRE 192 96 32 96 WIRE 192 128 32 128 WIRE 448 144 448 80 WIRE 448 144 368 144 WIRE 576 144 448 144 WIRE 32 160 32 128 WIRE 192 160 96 160 WIRE 96 208 96 160 WIRE 96 320 96 288 FLAG 96 320 0 FLAG 32 160 0 FLAG 144 16 0 SYMBOL SpecialFunctions\\sample 272 128 R0 WINDOW 0 -16 -113 Left 2 WINDOW 3 -56 -83 Left 2 SYMATTR InstName A1 SYMATTR Value ROUT=1m SYMBOL voltage 96 192 R0 WINDOW 0 48 76 Left 2 WINDOW 3 21 110 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 10u 1n 1n 500n 1u 1e6) SYMBOL voltage 448 -16 R0 WINDOW 0 57 42 Left 2 WINDOW 3 49 76 Left 2 SYMATTR InstName V2 SYMATTR Value 500m SYMBOL res 336 -144 R90 WINDOW 0 77 55 VBottom 2 WINDOW 3 85 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1k SYMBOL cap 128 -80 R0 WINDOW 0 -56 19 Left 2 WINDOW 3 -59 49 Left 2 SYMATTR InstName C1 SYMATTR Value 10p TEXT -200 112 Left 2 !.tran 100u TEXT -216 8 Left 2 ;S/H Stairstep TEXT -224 56 Left 2 ;JL Aug 12 2022