LT Spice LTRA

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

John,

The transmission lines on the top of the schematic are lossy transmission lines.

Bob

Version 4 SHEET 1 2584 752 WIRE -608 64 -640 64 WIRE -528 64 -608 64 WIRE -512 64 -528 64 WIRE -320 64 -432 64 WIRE -208 64 -320 64 WIRE 0 64 -112 64 WIRE 112 64 0 64 WIRE 656 64 112 64 WIRE 896 64 752 64 WIRE 1056 64 896 64 WIRE 1392 64 1056 64 WIRE 1648 64 1488 64 WIRE 1808 64 1648 64 WIRE 2144 64 1808 64 WIRE 2400 64 2240 64 WIRE 2416 64 2400 64 WIRE -640 112 -640 64 WIRE 0 128 0 64 WIRE 896 128 896 64 WIRE 1648 128 1648 64 WIRE -208 160 -208 96 WIRE -112 160 -112 96 WIRE 656 160 656 96 WIRE 752 160 752 96 WIRE 1392 160 1392 96 WIRE 1488 160 1488 96 WIRE 2144 160 2144 96 WIRE 2240 160 2240 96 WIRE 2416 160 2416 144 WIRE -528 176 -528 64 WIRE -640 224 -640 192 WIRE -528 272 -528 256 WIRE -384 272 -528 272 WIRE -352 272 -384 272 WIRE 0 288 0 208 WIRE 144 288 0 288 WIRE 400 288 240 288 WIRE 416 288 400 288 WIRE 896 288 896 208 WIRE 1040 288 896 288 WIRE 1296 288 1136 288 WIRE 1312 288 1296 288 WIRE 1648 288 1648 208 WIRE 1792 288 1648 288 WIRE 2048 288 1888 288 WIRE 2064 288 2048 288 WIRE -528 304 -528 272 WIRE 144 384 144 320 WIRE 240 384 240 320 WIRE 416 384 416 368 WIRE 1040 384 1040 320 WIRE 1136 384 1136 320 WIRE 1312 384 1312 368 WIRE 1792 384 1792 320 WIRE 1888 384 1888 320 WIRE 2064 384 2064 368 WIRE -528 416 -528 384 FLAG -640 224 0 FLAG -320 64 PATH_LAUNCH FLAG 240 384 0 FLAG 416 384 0 FLAG 144 384 0 FLAG 400 288 VIA1_END FLAG 1136 384 0 FLAG 1312 384 0 FLAG 1040 384 0 FLAG 1296 288 VIA2_END FLAG 752 160 0 FLAG 656 160 0 FLAG 112 64 VIA1_NODE FLAG 1056 64 VIA2_NODE FLAG -608 64 Vsource FLAG 2416 160 0 FLAG 2400 64 PATH_END FLAG 1888 384 0 FLAG 2064 384 0 FLAG 1792 384 0 FLAG 2048 288 VIA3_END FLAG 1808 64 VIA3_NODE FLAG -528 416 0 FLAG -384 272 Vref FLAG -112 160 0 FLAG -208 160 0 FLAG 1488 160 0 FLAG 1392 160 0 FLAG 2240 160 0 FLAG 2144 160 0 SYMBOL voltage -640 96 R0 WINDOW 3 -565 -87 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PWL file="auto random pwl data for LTSpice.txt" SYMATTR InstName V1 SYMBOL res -416 48 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL tline 192 304 R0 WINDOW 3 -73 -71 Left 0 SYMATTR Value Td=15p Z0=50 SYMATTR InstName T2 SYMBOL res 400 272 R0 SYMATTR InstName R3 SYMATTR Value 10000 SYMBOL res -16 112 R0 SYMATTR InstName R4 SYMATTR Value .001 SYMBOL tline 1088 304 R0 WINDOW 3 -73 -71 Left 0 SYMATTR Value Td=14p Z0=50 SYMATTR InstName T1 SYMBOL res 1296 272 R0 SYMATTR InstName R5 SYMATTR Value 10000 SYMBOL res 880 112 R0 SYMATTR InstName R6 SYMATTR Value .001 SYMBOL res 2400 48 R0 SYMATTR InstName R7 SYMATTR Value 50 SYMBOL tline 1840 304 R0 WINDOW 3 -73 -71 Left 0 SYMATTR Value Td=13p Z0=50 SYMATTR InstName T7 SYMBOL res 2048 272 R0 SYMATTR InstName R8 SYMATTR Value 10000 SYMBOL res 1632 112 R0 SYMATTR InstName R9 SYMATTR Value .001 SYMBOL res -544 160 R0 SYMATTR InstName R2 SYMATTR Value 1000 SYMBOL res -544 288 R0 SYMATTR InstName R10 SYMATTR Value 1000 SYMBOL ltline 704 80 R0 WINDOW 38 0 60 Center 0 SYMATTR SpiceModel BobLossyTLine1inch SYMATTR InstName O1 SYMATTR Value "" SYMBOL ltline -160 80 R0 WINDOW 38 0 60 Center 0 SYMATTR SpiceModel BobLossyTLine2inch SYMATTR InstName O2 SYMATTR Value "" SYMBOL ltline 1440 80 R0 WINDOW 38 0 60 Center 0 SYMATTR SpiceModel BobLossyTLine2inch SYMATTR InstName O3 SYMATTR Value "" SYMBOL ltline 2192 80 R0 WINDOW 38 0 60 Center 0 SYMATTR SpiceModel BobLossyTLine3inch SYMATTR InstName O4 SYMATTR Value "" TEXT -1192 72 Left 0 !.tran 0 10e-9 0 .1p TEXT -1192 136 Left 0 !.options baudrate 10e9 TEXT -1208 200 Left 0 ;Data for the PWL file is generated\nby a spreadsheet called\n"Piecewise linear data generator for LTSpice.xls" TEXT 448 448 Left 0 !.model BobLossyTLine1inch LTRA(len=1 R={RperInch} L={LperInch} C={CperInch}) TEXT 456 480 Left 0 !.model BobLossyTLine2inch LTRA(len=2 R={RperInch} L={LperInch} C={CperInch}) TEXT 456 512 Left 0 !.model BobLossyTLine3inch LTRA(len=3 R={RperInch} L={LperInch} C={CperInch}) TEXT 464 568 Left 0 !.param RperInch = 0.2*26.9 TEXT 464 608 Left 0 !.param LperInch = 7.978n TEXT 472 648 Left 0 !.param CperInch = 3.319p TEXT 960 568 Left 0 ;DEFAULT VALUES for 50ohm stripline:\n0.200 ohms/inch\n7.978 nH/inch\n3.219 pF/inch\nThe skin effect at 10GHZ multiplies the resistance per inch by a factor of 26.9.\nAlso, the "proximity effect" additionally multiplies the resistance per inch by\na factor of 1.5 for anything than a symmetrical stripline. TEXT -64 576 Left 0 !.step param RperInch LIST 0.200 5.400 TEXT -48 648 Left 0 !.step param CperInch LIST 3.119p 3.319p TEXT -56 608 Left 0 !.step param LperInch LIST 7.878n 8.078n

Yikes! I'd been connecting the signals to the zigzag thing in the middle, and grounding the plates! That sort of explains not getting any output.

Thanks

John

I was almost gonna say "Is it plugged in?" but then bit my lip :-)

I'm too used to PADS, which won't let you leave wires dangling any old where. If it's not a valid connection, there can't be a line.

John

Eagle lets you draw anything. That has a huge advantage: I can draw timing diagrams, flow charts, mechanical sketches, anything. People have generated wedding cake templates with it. However, if you hit the ERC button it'll generate a warning list with all the locations that have loose ends. LTSpice doesn't :-(

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Oh, PADS lets me add "2d lines" and text on a schematic, but they don't conduct electricity. But it won't let me draw a dangling connection. I remember one version of ORCAD that would tend to terminate a wire just a pixel or two short of a node, *inside* a connection dot, so it looked connected but wasn't. PADS won't allow that. Once you start a connection line, you have to end it on a node or bail.

You can create an offpage in PADS and never create a mate for it, but that's easily checked for. PADS will also import/export all (as in ALL, including decals) of a schematic or PCB in ASCII. I wrote a couple of PowerBasic programs to do crosschecks of netlists, and one to check a PCB against our BOM. The Brat loves them.

LT Spice let me apparently connect to graphic-only features of the delay line symbol, and ran the simulation with no warnings. And no output! It doesn't seem to mind dangling wires.

Incidentally, the LT Spice delay line model has differential signal connectivity from one end to the other, but no common-mode connectivity. So a short lossless delay line behaves like an ideal 1:1 transformer. There must be a use for that.

Version 4 SHEET 1 880 680 WIRE 96 80 32 80 WIRE 400 80 224 80 WIRE 32 112 32 80 WIRE 96 128 96 80 WIRE 128 128 96 128 WIRE 224 128 224 80 WIRE 400 128 400 80 WIRE 128 160 32 160 WIRE 336 160 224 160 WIRE 32 192 32 160 WIRE 336 240 336 160 WIRE 400 240 400 208 WIRE 400 240 336 240 WIRE 32 304 32 272 WIRE 336 304 336 240 FLAG 32 304 0 FLAG 336 304 0 FLAG 32 112 0 SYMBOL tline 176 144 R0 WINDOW 0 -19 -40 Left 0 WINDOW 3 -67 45 Left 0 SYMATTR InstName T1 SYMATTR Value Td=100n Z0=50 SYMBOL voltage 32 176 R0 WINDOW 3 46 103 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 1 1u) SYMBOL res 384 112 R0 SYMATTR InstName R1 SYMATTR Value 1 TEXT 128 232 Left 0 !.tran 100u

John

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Turn on the connection dots. It's in some menu or other.

Cheers

Phil Hobbs

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It still allows dangling wires, and apparent connections that aren't. No big deal, I know now.

John

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I remember the drill in some Orcad Versions, move every part and see if all the spaghetti moves as well.

One of the more common mistakes when people use delay lines for the first time is not connecting the other end to GND (or to somewhere else). "But I don't have to do that on real coax!"

Guilty. I have used TX lines as transformers.

Let your sim below run hi-Z, send short pulses in, and you'll get an interesting pattern coming out :-)