Stabilizing pHEMTs

Hi, Phil,

I usually use them in switch mode, with a hard gate drive, and they are OK there. If they did oscillate, I'd know it... jitter would go way up.

The RF boys drive them with tuned circuits, matching the gate impedance, and get that to work somehow.

So maybe the key is the gate impedance, which in your case is high. You can't do anything about that, since that's important to your app.

Some microscopic bead in the gate might help. At these speeds, there are no high impedances.

Can you do something to the drain, like add a bit of capacitance or R-C to ground? Your signal BW is 120 MHz, so there is some room to kill GHz gain. Just the wire bonds of the cascode NPN may be enough to resonate.

PCB layout is important, too. You've got to really ground the source leads, like to a topside pour with a lot of vias to ground. And obviously keep the gate and drain from coupling. Maybe via the drain to an inner layer ASAP.

I have used small mesfets and phemts in linear modes, but the gate and drain impedances were low. I had to give that up not because of oscillations, but because the gate DC offsets changed erratically, trapping state migration or something like that.

Never tried, but heard a story where the PCB trace from driver to gate has a slab of ferrite on top, adjusted to the complex conjugate of the gate impedance. Worked like a champ but each one had to be tweaked - a PITA.

That's one of the tricks, rocks glued onto the board. One method is to find the minimum size ferrite "rock" and then use a bigger one for margin. Of course the glue is a bit of a concern, they shouldn't fall off after some years.

Nastier: A 5ohm SMT bead (small), cutting disk in a Dremel, whirrrrrr ... cut until signal bandwidth begins to look good. Cut some more until oscillation sets in. If those two points are far enough apart pick something in the middle. There'll probably be enviro and OSHA issues to deal with, dust control and all that.

Question: Did you run the trace to the gate at the other side of the ground/supply planes or sandwiched in?

A photo and maybe the layout would help.

I have bought these avago phemts mentioned in the other thread to build high-IP3 lo noise preamps for the 144 and 432 MHz ham bands. When I had the transistors I simulated them and found that I couldn't do much useful at these low frequencies. The gain at 100 MHz is outrageous and the s-param stability criteria are depressing.

Things that can be done (with other GaAsFets, too) is a 20R in the drain, which you probably won't like ( or you would not need the cascode) and a _few_ mm of source leads. That helps at low frequencies but will lead to oscillations at 10 GHz or so if driven too far.

Somehow this shifts the problem to higher frequencies, but if one doesn't need 10 GHz performance one can design the circuit as a SHF swamp.

You may also encounter waveguide oscillations that only show up if you close the box that contains the amp. Absorber foam helps, as does keeping the waveguide diameter small enough. That can be hard.

/Gerhard

In my limited experience, a big part of the oscillation problem was from actual, physical feedback, such as coupling from lead- to-lead. That interacts with device parameters, e.g. capacitance and bond-wire inductances, to make an oscillator.

I made an LNA with an NE251, a dual-gate GaAsFET (now obsolete) that was absolutely gorgeous, feedback-wise. That's a cascode in a package, and it acted like it.

So, that's a long intro to this idea: if your cascode isn't stiff, the pHEMT drain moves, and feeds back to the gate. That's especially bad when the gate drive's hi-z.

Maybe that f.b. on the BJT's base isn't the answer. I'm not sure what is, but I'd try a low-value resistor for starters. All you need is a dissipative element to kill the Q of the BJT resonances. 10 ohms just might do.

The usual r.f. way to stabilize the FET for broadband service would be to neutralize it.

See

There are a few tweaks: The zero-ohm resistor is actually a 1 uF cap, replaced with 1 pF for input capacitance measurements. the pHEMT is a SKY65050 or NE3508, and the collector load is 200 ohms. Supplies are about +-10 V.

Thanks

Phil Hobbs

The photo is a bit fuzzy in the upper left but it looks like the input and output traces are all on the top layer. Input and output should be on opposite sides of a plane. This doesn't have to be a ground plane but should not be a split one. I can see some sort of split (faint dark lines).

Can't see C5, looks like it may be a bit far away. Which is a concern. Generally, I'd always have a 0.1uF 0603 (or smaller size) for bypassing. And smack dab at the top of R2. Anyhow, that trace from Q2 to R2 and then on to U1 is a bit long and too close to the input trace (R11). Moving U1 north by about 0.500" would clean that up quite well.

The via for C1 is too far from it, looks like more than 0.100".

A little ferrite rock in front of Q1's gate would help, right at Q1. But it must be on the other side. Looks like you can afford a roll-off since the THS3091 isn't really a rocket, rolling off around 200MHz. The bypass cap C4 is too far away from it.

Please don't take this as dissing, just some ideas how to make the layout a little better :-)

Thanks.

No worries about dissing me about the layout--If it's wrong, Mother Nature will point it out a lot less gently than you.

The via near C1 isn't the ground side, it's the R9 side. C1, C5, and Q1 all have ground vias right inside their pads. There's a ground cutout under the pHEMT to reduce the pad capacitances, with the source leads grounded on either corner of the cutout. (There's a zipfile with the board layout in PDF and Gerber.)

I'm not sure that it's input-output related, because it's lovely and stable with a SKY65050, which theoretically has about the same f_max as the NE3508, but I could certainly be mistaken about that.

C4 is only about 0.1 inch from the THS3091 (see the C-grid header for scale). Is that really too far for a 200 MHz amp? It should be only about 2 nH or so.

Cheers

Phil Hobbs

Oh, and those dark lines aren't splits in the ground plane, they're traces on level 2--the stackup is 1&2 signals, 3 ground, 4 signals, chosen in order to reduce the pad capacitances.

Cheers

Phil Hobbs

I looked in the Gerbers: C5 is way out there in Podunk. So in essence you possibly have R2 connected to a large loop, a.k.a. antenna :-)

The Gerbers imported with errors so I can't see where the via north of R2 goes to, but that trace in itself is an inductor as well. If that via doesn't go anywhere useful, could you trip another cap to GND right at R2? Maybe over to the via at C6.

Old Muntz would have said "Then use the Skyworks transistor" :-)

Ah, ok. Just don't do that on larger boards because it can result in warpage and assembler unhappiness. #2 should be some sort of plane, ideally the ground plane. Then #3 for power planes which can be split.

Hmm. I was sort of relying on the 1k resistor for some isolation, but that might be the wrong answer.

Yup, and if I could live with 0.8 pF C_in and 0.5 nV noise, I would. Unfortunately there's that 62-electron signal to deal with, and I really need 0.3 pF C_in for the wire-bonded pHEMT die. (I realize that I get hit with ~0.15-0.2 pF per pad even with 0603s.) The issue as usual is input capacitance differentiating the input noise of the front end amp.

Thanks, Joerg, that's a great help. The Gerbers were generated by Sunstone from my Eagle files, and they view fine in gerbv, which is part of gEDA.

Cheers

Phil Hobbs

I like those symbols you must of designed..for J1, J3 and for Vss. Snazzy and creative.

Alas, I can't take credit for them--they come with Eagle.

Cheers

Phil Hobbs

C5 must be right at the other end of R2. Any sort of trace results not only in an inductance which causes undesired gain peaking but also an antenna that will do who knows what.

I am sure you'll get it stable. Even if it takes some dirty tricks like series resonant circuits. A network analyzer style plot goes a long ways here. That's why having at least a spectrum analyzer with tracking generator is a good thing.

If you generate your own with the Eagle CAM processor you can go to places where it costs less. Then use the difference to take your wife out to dinner :-)

A good test is to see if your file load into a software commonly used by PCB houses, such as GC-Preview. There's a free version with nag screen.

The other question that remains: Where does that via north of R2 go to? It's right next to the emitter which can have scary results. Because there is no bypass cap in the area this whole collector node looks like a loose cannon :-)

But it can be kludged into compliance with rework. If this is for a product you'll have to do a relayout but I'd first get it to work with this board, some copper tape and caps.

Thanks. That was actually the first PCB I ever laid out in my life, despite having been a professional designer since 1981--I've always had draughtsmen available for the job. (I also usually stick with parts slower than 20 GHz f_max.)

Cheers

Phil Hobbs

It goes to the bottom layer, all alone on the other side of the ground plane, and connects to C5. I'll try Dremelling down to the ground plane and putting in another cap locally.

Cheers

Phil Hobbs

I've not followed all Joerg's prose, but one thing that might also help is to add a small series RC damping network at the BFP650 emitter.

Did you try to probe the oscillation with a small loop and your spec analyzer to see at which frequency (frequencies) it screams?

Putting one's finger everywhere on the board might also help to find a solution (damping). Mine have been pretty good at this and yours probably work fine too :-)