splitting a filter

They were used later than the 545, too. I remember those horrors from my college days. The Tek techs were *really* good at setting them, though.

Reply to
krw
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The heathkit IO-10 scope had a couple of etched boards with a pattern like this:

_ _ _ ___| | | | | and so on. |_| |_|

but bigger - about 5" wide, about 12" long, with about .03 traces and .03 gaps. (and lots of ups and downs! ;-) ). There were two boards that bolted together with a spacer, to make some sort of transmission line.

Cheers! RIch

Reply to
Rich Grise

've

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The filters are passive, hence IIR. Nothing I said is incorrect.

Reply to
miso

Yes.

We do a little of everything. Slow delta-sigma dacs are easy, using one port pin of an FPGA and an RC lowpass.

We did some really fun arbitrary-waveform DDSs, with all sorts of modulation and summing tricks. This one

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includes lookup table interpolation, which really improves DDS behavior. Does bandwidth-programmable Gaussian noise, too. Maybe some day somebody will buy some.

We do crystal oscillator synchronizer loops with a strange phase detector. It's like a standard zero-dead-time charge pump, but we bring out separate low-impedance UP and DOWN pulses. Each goes through a schottky diode and a resistor into the summing point of an opamp at Vcc/2. FPGA outputs don't make very nice "classic" charge pumps. I invented that phase detector, probably after 10,000 other people invented it first.

Our digital delay generators use a very strange PLL. When we get a trigger pulse, we start a 50 MHz zero-latency LC oscillator and use that to count off the coarse part of time delays. An ADC, clocked by a good crystal oscillator, digitizes the LC oscillator waveform, runs that data through a magical mystery algorithm, and that drives a DAC and a varicap to lock the LC oscillator to the XO's frequency and phase noise accuracy, but still synchronous to the external trigger. That has a chance of being unique.

We also do all sorts of filters, calibration algorithms, dithering, synchronous detection weird stuff. FPGAs are liberating because you don't have to worry about complexity; if you need 4000 gates, you just use them. All that college information theory/signals-and-systems/number theory stuff comes back when you have those sorts of resources.

Not all the stuff we do sells, but all of it is fun.

John

Reply to
John Larkin

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That's the vertical signal delay line. It allows you to see the rising edge of the signal you're triggering on. All such lines are lossy and dispersive, so there's usually some awful equilization networks to compensate.

John

Reply to
John Larkin

text -

Hold on now -- I haven't seen anything in the thread to indicate that it _can't_ be done, just that you have to approach the problem with some care.

Splitting it up 2 and 3 should work well, unless you swamp an amplifier.

What's the deal-killer that you see?

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

text -

Given a 5-pole Bessel LC filter, how do yo split it into two sections that have buffer amps and cable between?

John

Reply to
John Larkin

Is designing an LC or CLC section to a given Q, frequency and purely active input/output resistance a problem for you? Oh, Hell.

VLV

Reply to
Vladimir Vassilevsky

text -

2 pole filter --> buffer amp --> cable --> buffer amp --> 3 pole filter.

Or 3 pole first and then 2 pole. Make sure that the buffer amps don't participate in the filtering much if at all (which is made easier by the fact that it's a Bessel filter).

Designing an LC filter to a transfer function isn't difficult if it's not too high an order.

Send me mail if you want me to do it.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html
Reply to
Tim Wescott

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Factor the polynomial and build a 3 pole and 2 pole pass filter by brute force. You know the topology of the LCR networks. Solve using network theory then map the coefficients of the factors polynomial to the solutions of the network.

I did a brief signal flow diagram of a LCR network to see if there was some trick in manipulating the diagram to get two networks. I think the answer to that is no since a ladder sends it's signals in both directions, so there is no ground referenced scheme to split one.

Reply to
miso

Cool, thanks for the information John.

Reply to
Joel Koltner

The secret was to recognize when you'd got it as good as it would go, and any more trying would make it worse :-(

--
"For a successful technology, reality must take precedence 
over public relations, for nature cannot be fooled."
                                       (Richard Feynman)
Reply to
Fred Abse

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