I realize that when spice tries does a transient analysis it has to generate a matrix of some kind in which in it solves for the various for the various voltages and currents. I also realize that spice must use some kind of modified nodal analysis to do all it's calculations. Thus spice should know all the capacitances at every circuit node within the circuit. At least it must "know" what they are at some point when it generates the matrix of equations. The question I have is, how can I ask spice what all these capacitances are? Is it possible to get the parasitic capacitances to printed out as well as what it thinks the capacitances should be?
Yes, you are correct. Spice needs the correct parameters to solve the equations. The parameters are in the model for each component.
For example, the LTspice model for a capacitor includes values for series resistance and inductance, parallel resistance and capacitance, plus other miscellaneous parameters such as voltage and rms current rating, etc. There are default values for each component that you can find in the documentation.
You can get very strange results in some circuits if you do not enter the correct values for these parasitics. For example, the default series resistance for an inductor may be extremely low. If you use the induictor in a resonant tank, you will get abnormally high Q, and the circuit won't perform the way it whould.
Many spices also allow you to specify a nodal resistance to ground if one is not included in the circuit. This is usually high enough that it won't have any effect on a circuit.
Others may be able to answer your question in more detail.
Are you saying that you think Spice should be able to figure out, with no help from you, what the parasitic capacitances are in a circuit you could build in an infinite variety of physical implementations, each with a different set of parasitics?? Nooooo, I don't think so! Parasitic capacitances are the result of the physical dimensions of the conductors and dielectrics in your circuit. For example, a pad for a surface mount part will have a certain capacitance if there is a ground plane on the next layer down, 4 mils away on a 12 layer board, and quite a different capacitance on a single sided board with no ground plane.
I do hope I'm misinterpreting what you are asking! If I'm not, perhaps my answer above will give you a hint that in circuits where parasitic effects are important, you need to pay close attention to them, and make sure you get them right. Same applies to parasitic inductance, leakage resistance in high impedance circuits, and the like.
The only capacitances in a Spice circuit are the ones you put there. It certainly is easy enough to ask what the impedance between two nodes is in the circuit you enter, and in fact you can pretty easily write an expression to display the impedance as an equivalent resistance in series with an equivalent inductance or capacitance. The impedance is simply the voltage difference between the nodes divided by the current through the network connecting them. Beware of other current paths; this works best if the network only connects to those two nodes and nothing else.
Sorry, perhaps I worded this question incorrectly. I don't expect spice to able to calculate parasitic capacitances that put there. I.e, if I model an inductor, and I specifically place a parasitic capacitance within the model of the inductor then spice knows it exists and should take into account. Usually I will place all the parasitics on the schematic and some of them should be implied as well. (When you place a transistor, you should tell spice only what the unit gate capacitance is and it should be able to figure out the total gate capacitance...correct?) However when the schematic gets large, it is quite easy for me to forget all the parasitics that are connected to that specific node, but spice should know what those are. I was wondering, if I could spice to spit it for me, so that I don't accidentally forget something. Best Regards,
WHY do you think Spice will know about parasitics if you don't tell it?? I'll repeat, Spice only models what you explicitly put into its netlist. If you think there is parasitic capacitance from one node to another (possibly to ground, for example) that's big enough it will significantly affect the performance of your circuit, then figure out how much capacitance there is in your physical implementation, and put it in the model. Spice does not work from a physical model, it works from a mathematical abstraction. It's up to you to make sure the physical world is accurately described by the information you feed Spice about your circuit. If you're dealing with semiconductor design there may be special issues someone like Jim Thompson (who posts regularly here) could help with.
There ARE design programs that take into account the physical layout, treating printed circuit traces and pads as transmission lines with distributed capacitance and inductance. The Spice engine is not one of those. In some versions of Spice, including LTSpice, you can create a library of models of specific parts like inductors that include at least limited parasitic information like series resistance, shunt resistance and shunt capacitance. Capacitors in LTSpice can include parasitics. Spice models for semiconductors have lots of parameters to describe the semiconductor behaviour (including voltage- dependent capacitance, resistances you might wish were zero but are not, ...), but do not include package inductance, capacitance, and resistance. Some manufacturers' models of packaged semiconductors do include those effects.
But if you accidentally forget to put a critical coupling capacitor in your circuit, would you expect Spice to tell you, "Hey, you forgot to put in a capacitor here. You probably want 0.22uF, so I put it in for you." No? Then don't expect it to think of what parasitics might be in your physical implementation that you left out of your model.
A netlist is a list of components showing which nodes each is connected to. My reading of your question is that you want a list of nodes showing which components each is connected to, or perhaps just listing nodes not connected to any capacitors or semiconductors.
I am fairly sure that standard Berkeley SPice 3f4 has no command to do what you want, although I seem to recall that HSpice does.
If you are using a Berkeley Spice derivative, you might use the 'listing expand' command to produce a flattened netlist. Then use a scripting language such as Perl to parse this and produce your list. It would be tricky to get to handle devices with variable numbers of nodes perfectly. However, you probably don't need perfection.
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