SPI transmission line thing

Den fredag den 21. august 2015 kl. 23.47.37 UTC+2 skrev John Larkin:

with 7ns risetime all the lines after the T is so short they hardly matter

run the sim with wires instead of all the short transmission lines, the waveforms are near identical

-Lasse

Not necessarily. The shift register can still shift data but the load occurs on enable (not).

You got that right! I bought the SPI/I2C module for my scope. The SPI function is useless. It's so constrained that it doesn't work for any real SPI devices.

My layout guy would shoot me. Memory busses are one thing but length matching for SPI? He'd laugh at me. Then shoot me.

We've done matched-length pairs for PCI Express. Nuisance.

It's only one line. How lazy is he really?

Cheers

Phil Hobbs

My guess would be you couldn't. I got most of the way there with a narrow t rack on a 1.5mm thick Teflon-alumina (microwave material with a low dielect ric constant)substrate. We couldn't even get to 75R with buried (stripline) tracks in FR4 and barely made 90R with surface (microstrip)on a FR4 six-la yer board.

Length matching one line is easy. ;-) It's when that one line splits and each fork is going a different direction, on different planes (oh, you're limiting him to one plane, too?), that life gets tough. No, he wouldn't like it at all. They're not lazy, just have a lot on their plate. I don't want them subbing the work out to Asia, either.

Ok, I get that. I didn't get what the serpentine traces were about, but you just mean to lay out traces of matched length.

I worked on an array processor many years ago (a DSP chip in a double wide rack cabinet). They fed clocks to the boards using twisted pair cables across the back plane. Each machine had to be hand tuned which made a nightmare for the field maintenance guys when replacing boards. In the next generation they designed tapped, serpentine traces for the clock so the boards could be tuned rather than the back plane cables.

Wake up, Rip, it's 2015. 7 ns *is* slow.

To my understanding, SPI was designed to carry simple TTL signals across some PCB boards a few centimeters away at around 1 Mbit/s.

If you try to misuse the simple standard for something it was never intended for, you should expect some serious problems doing so (propagation delays, ground potential differences etc).

Some SPI goes as fast as 50 MHz, but we're simulating thermocouples and only need to update 8 channels at some 10s of Hz. A 5 MHz SPI clock should be about right.

I'm an engineer. It's my job to make things work. Work the first time, ideally, which is why it's worth simulating something this simple.

I've seen short, point-to-point SPI links mess up.

We can get about a 90 ohm trace on the top of a 6-layer FR4 board, with the ground plane as layer 2 about 10 mils down. That's a 6 mil trace. A 6 mil trace would be about 50 ohms on an inner layer. I don't see how people can get sensible impedances on inner layers of 12 and 16 layer boards.

Use Rogers. ;)

Cheers

Phil Hobbs

I could do the Heaviside trick, add an inductor every inch or so.