Hello All
I have been reading about soi body contact and back gate bias. However I am not sure if the soi nmos and pmos has the same body contact biasing or not(0V or Vdd). It seems like the body contact is connected to the source for nmos.
Also I am not sure if the back gate voltage bias is at 0V for all devices in the chip. It is said the the back gate voltage for nmos is 0V while for pmos is
-Vdd.
Kindly share with me your views on how to interprete the reasons for such connections.
Thank you
best regards Jason