SOAR confusion

As far as I can see right next to figure 3 in figure 4 it is specified as D = tp / t, so like pulse width?

Indeed testing is the eating of the pudding!

Un bel giorno john larkin digitò:

I would say that the SOA figure shows you the "worst case" data, therefore they consider the maximum Rds(on) instead of the typical. D=0 means a single pulse (no duty cycle).

The part is rated for 71W when it is completely ON; they don't say it explicitly, but for switching MOSFETs it is implied. Instead, with Vds=30V and 1A you are in the linear region, and the power is limited also by other factors than "just" the joule effect (e.g. thermal runaway, second breakdown). If you follow the same 10 ms curve up to the Rds(on) limit, where the MOSFET is completely ON, you have about 2V, 50A which is 100W: as expected the peak power is greater with shorter pulses (see also the figure

There are specific MOSFET families made to be used in the linear region, that have a wider SOA. However MOSFETs are always less happy to be used in the linear region than bipolar transistors.

OK, that mostly makes sense.

But fig 5 says that the voltage drop will be about 0.9 volts at 50 amps, and the SOAR says that it will be about 2 volts, limited by Rds-on.

Fig 6 shows Rds below 15m typ at +10 on the gate.

I want to run them pulsed, hard on or off, 12 volts on the gate, at 50 amps. That looks safe, but the SOAR graph doesn't make sense. I guess they usually don't.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Typical is usually at room temperature. SOA curve probably uses maximal possible Rds-on which is likely to be at higher temperature. IIUC actual SOA may be larger, but they do not want to draw too complex boundaries.

The part is specified for RDSon>=33mR at VGS=6V.

Single pulde.

You'd need a measurement for Tj - this ain't gonna happen.

If melted wafer solder floats your boat, then go ahead.

RL

That doesn't explain it. Rds-on max is 18 mohms, and the SOAR graph says 25 deg C.

SOAR curves must be assigned to the dullest interns.

Some lawyers could get rich suing about data sheet blunders.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

The external temperature may be 25 degrees Celcius, but temperature that matters is in the middle of the die.

Dissipate enough heat in the channel - 33A across 0.04R is 44W or about

Sometimes they get read by decidedly dull engineers.

The SOAR limits take precedence because it takes into account the transient junction temperature rise, and it really pushes everything to the extreme of Tj=175oC. Note that the otherwise unspecified temperatures T refers to maintaining the case at 25oC. Fig.9 shows dependence of RDS,ON versus Tj, taken out to Tj=175oC. This moves the 15mR, Tj=25oC out to nearly 32mR at the extreme Tj=175oC. So that's where your low RDS,ON went.

A 50A pulse into 40mR RDS,ON = 2VDS. And according to SOAR, you can only maintain that abuse for pulse durations of 1ms or less. It's a simplification because it assumes Tj responds instantaneously, but not totally unrealistic because you're on your way to hitting Tj 175 °C. All of this assumes that you want the part to last indefinitely, or so they claim.

What pulsewidths were you contemplating?

The "limited by on resistance" is a straight line, always 40 mohms.

Explain that.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

I wonder why they did the SOAR graph with 6 volts on the gate.

We just need to figure out what kills them, and back off some.

We did that for our NMR gradient driver fets.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

For completeness, it should be noted that if your circuit ambient temperature differs from 25oC significanlty, then your SOAR operating point needs to derated by (TambientoC-25oC)/2.1oC/W Watts. And this in order to keep Tj<=175oC. It may be this part is unsuited for 50A pulses. The postive tempco of RDS does allow the possibility of parallel operation.

It's an example of what a constant 40mOhm resistance would do. What did you think it meant?

You do have to figure it out in terms you can understand. Having to do experiments to get there is tedious, but experiments have a short way with imperfect understanding, though it does take time to set them up.

Since you clearly didn't understand what they were trying to tell you, this does make sense. Getting the level right in any instructive material is always difficult, and teachers who do understand the subject have a problem with putting enough extra data in for people who don't.

I have no idea why they plotted 40 milliohms. The point where I plan to operate is 50 amps and, probably, around 0.75 volts. According to the SOAR graph, that doesn't even exist.

I just Dremel'd a test board, two fets to make 100 amp pulses. I'm waiting for the fets to finish it. I'll pulse it for a month or so to make sure things are stable.

Avtech suddenly went out of business and we have some inquiries. One problem is that Avtech had a zillion products with a zillion variants, so they didn't sell many of each.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Fun. They made some cool stuff.

Cheers

Phil Hobbs

Where does it say they did? The headline Rds value is given at a Tj of 25 C. The SOA graph is with the junction(s) at max working temp.

There is nothing wrong with the graph.

When I was working on voltage contrast electron microscopy Cambridge Instruments, which involved stroboscopic electron microscopy, where the electron beam got turned on for as little as half a nanosecond, our competitor Lintech relied on Avtech for their beam-unblanking pulses, which seemed to use snap-off diodes, which are very cranky beasts. We went for 5GHz broad-band transistors, which were much more predictable.

Lintech went bust, and their boss became our technical director for a couple of years. He didn't push for us to adopt the Avtech products,

It semed to be a sort of hobby business for the founder. Lots of complex stuff full of avalanche transistors, varicaps, SRDs, DSRDs, SiC fets, transmission lines. Yes, fun stuff.

But not very manufacturable. When he died, his son, an MD, didn't want to keep it going.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

We might be interested in doing some of that stuff too.

Cheers

Phil Hobbs