fast divider?

I assume these are up-counters, so the thing overflows at all 1's. Then you only have the one fast carry TPD for the MS18b overflowing to all 1s when a 1 is clocked into its LSB. One whole clock period to clock the 1 out of the DFF and meet the setup times for what I assume is a synchronous LD and its setup for the counters. So that particular timing criticality is a DFF TPD and a LD setup TSU to reliably capture the register data. The LD TPD to CLK TSU for the LS18b counter shouldn't be a problem. This must be very speedy logic for 150MHz. Do you have a simulator that displays how much margin you have on this timing, or is it just a bunch waveforms?

Yes, loadable up-counter with carry chain.

This would be in an FPGA, so the diagram is just a concept. The reality will be VHDL code. And the FPGA boys use the Wishbone architecture and want the counter to be 32 bits, which is OK with me.

We are already doing a DDS at 250 MHz on this chip, an Efinix T20, so I expect we could do a divider in that ballpark. The T20 is in the

I think the T20 has 18-bit fast carry chains.

After the boys code this, the tools can verify timing.

FPGAs are great, but there's a cultural gap between people who draw and people who type.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Can't say I've noticed that, but since I can do both, and most of the engineers I've hung out with could too, John Larkin may be projecting here.

Gosh Bill, you are wonderful. You are great at everything. What are you designing now?

I designed some PLDs, from PALS to PEELS to the antifuse Actel FPGAs, but it's mostly grunt work, so I give requirements to kids to type the VHDL for me. I have an ex-physicist doing that for us now.

What was interesting about the otp Actel parts is that the design was schematic entry, and it had to be right the first time.

Modern FPGA design is like cpu coding: hack it fast and run it and see what happens and when it doesn't work, fix it.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

I'm certainly not great at writing VHDL. There's a VHDL text-book on my bookshelf - bought for a project which didn't come off - but the stuff I did type was in a much less powerful language, but powerful enough to get the chip to do what I wanted it to.

Absolutely nothing. I do fish for work from time to time, but at 83 I'm not an attractive employee.

Getting anything to work is mostly grunt work.

One time programmable parts are like that. It's nice to be able simulate the design before you blow the fuses.

Reprogrammable parts are lot more forgiving. Hacking it fast isn't a great way to design stuff. It too easy to dive down the wrong rabbit hole, and keep digging, when you ought sit back and think it out again.

Big software projects have exactly the same problem. Windows is a steaming heap of legacy software.

I have a lot of interest in the Bruchla circuit as about things like transistor nets to effect things like Fourier-style analysis.

The Bruchla circuit among accounts of things like integrators and differentiators, is for the middling account of dividers, that otherwise doesn't have exactly a simple ideal circuit.

I used Actel nearly 40 years ago. Schematic entry was just one way to do it. They made that available for engineers fixed in their ways who were totally blown away by that state machine/ register transfer language alternative method they had. State machine/RTL entry is better for controls type of circuits, mostly FFs and next state gate logic, schematic entry is better for combining larger-scale entities like counters into a final system. VHDL looks like assembly language programming. Seems it would be a limitation if that's all someone knew.

I base the observation on people that I work with, and lately on hundreds of people that I meet at maker-space meetups. Many are kids with CE/EE degrees who don't know much about electricity and who don't have jobs.

A Linked-In ad for fpga coders will get hundreds of applicants in a few days. Circuit designers, not so many. I have a couple of quick tests to find the rare kid that gets electronics.

Is there some specific Bruchla frequency divider circuit?

There seem to be a lot of 50-year old Bruchla circuits online. Looks like mostly audio.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

You don't like hiring people with a Ph.D. My employers didn't have that problem.

And presumably also test their willingness to flatter you at every possible opportunity.

There are lots of odd ways of implementing frequency dividers. Synchronous dividers can be made to work at higher frequencies than ripple carry dividers, and synchronous dividers with fast carry feed-forward hardware can be designed to count even faster.

Duplicating known hardware solutions inside an FPGA can't be all that difficult. There are some remarkably fast FPGAs around. When I last looked they were remarkably expensive, but that was about twenty years ago.

Mostly people express intent in an HDL, basically say X=X+1, and the compiler makes that happen. The things inside a modern FPGA look nothing like 7400-series logic.

I'm doing a DDS frequency synthesizer in a $9 Efinix FPGA, running at

I'm running the DDS, driving a 5-resistor DAC and running a bunch of other stuff, using 24 mA at 1.2v core supply. It doesn't even feel warm.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Why would they? I tended to used 100k ECL and ECLinPS when it became available. It was a whole lot faster that 7400-series logic, and a lot better at driving terminated transmission lines.

Because I worked on electron-beam microfabricators and electron-bream testers for some of my time at Cambridge I did have some idea of what the working surface of integrated circuit looked like, but not enough to be able to distinguish a TLL part from an ECL part or any of the flavours of field programmable devices.

We could have done that in ECLinPs in 1995. It wouldn't have been all that expensive.

Really small transistors running at 1.1V don't need to steer much current. Keeping all the fast bits inside an FPGA means that there isn't a lot of capacitance to charge and discharge either.

Imagine making a 32-bit ECL register driving a 32-bit phase accumulator driving a 10K-word sine lookup table driving an ECL-compatible DAC. With maybe 1000 pulldown resistors.

With its own Honda generator and a bunch of fans.

Gosh, you *do* have a sense of humor.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

The reality was less intimidating. But I do remember getting a complaint from the people trying to load one of our extended triple euro-cards.

The project manager we got stuck with at the start of the project thought that design reviews weren't essential, and tried to save time by skipping them. There were some 500 pull-down resistors on the board in question, and the circuit diagram didn't tie up with the printed circuit layout, so I had to spend three days going over the circuit design and the printed circuit layout finding the parts that had been miss-labelled

- about thirty of them - and pull everything together.

The project manager got moved on around that point (but not for that reason), and that screw-up wasn't the the worst thing he did. A shift and add multiplier didn't work for about a year, until the software guys realised that it was only screwing up negative numbers. If you downshift a negative number you have to feed in ones rather than zeros at the high end of the number. It took me about an hour to realise that the sub-contractor hadn't bothered to do this, and about as long to bodge the board so that it did the right thing for small shifts (which were what was mostly used - you had to average for a long time before you'd need big downshifts). A proper solution wasn't all that difficult, but we didn't bother going the whole hog - averaging for long time meant that with big shifts it made sense to upload the numbers into our real-time processor and crunch them there.

I hadn't thought of doing that at the design stage, but a couple of years of working with our software guys had made me much happier about passing over stuff to them.

I'd probably have found the problem if I'd had a chance to review the sub-contractors schematic, and if the project manager had followed our house rules I would have got to review it befor it went off for printed circuit layout.

Weirdly, the project manager has a sister who worked with my wife and - much later - married my wife's first graduate student (second marriages on both sides - nice people). Apparently he though I was "difficult".

The rack holding the boards did a have a flat row of fans along the top, and if you were using a board on an extender you have to park a desk fan next to it. The fans used a lot less power than the boards. We didn't have any trouble finding suitable power supplies, and the machine didn't get hot enough for anybody to complain.

But one of the reasons for going for triple extend euro-cards was to have enough pins to carry all the current. And I did use mixed signal

Join one of those maker space things, meet some people, offer to help for free, see what happens.

We invented our triggered, phaselocked LC oscillator, which is pretty gnarly. We progammed the loop into an Actel and it locked first try.

The OTPs are like laying out a PCB: check it hard and get it right. At least you can hack a PCB.

Garbage, but continually being repaired.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

I'm active on the committee of NSW branch of the IEEE but I don't know of any maker space things in Sydney.

When you first started talking about it, you'd dug it out of Hewlett-Packard Journal article from the 1970's. Triggered oscillators for precision timing have always struck me as terrible idea. They were a lot less terrible in 1970's when regular oscillators weren't all that good either.

Not exactly garbage, but they do keep finding and fixing imperfections. I'm still running Windows 7. My laptop runs Windows 10. I'm not moved to try to up-grade, and when I talked to a Microsoft ambassador I happen to know he did mention that Windows 10 does like to interrogate an identity chip on start up - a chip that my 2011 desk-top computer doesn't have.

Hey, you could google

maker spaces sydney australia

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

It's been said the steam engine did far more for engineering than engineering did for the steam engine.

Ditto thermodynamics.

Einstein's theories of relativity seem to be the rare case of predicting effects before they were observed, some decades before they could be demonstrated.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

The periodic table of elements is a usual example.

There were holes in it placeholders for elements or atomic species, later discovered.

The usual account since antiquity was that stringed musical instruments could be made reproducible their sound according to a theory of construction.

That physics or its science has got a ways ahead of the mathematics, still has that there are tons and tons of old-fashioned and considered obsolete the physics, for example "Faraday Rotation", that simply enough just need mathematics to bring them right back.

Otherwise though it's usual that only after the un-attainable sort of theoretical results of the fundamental physics of the 20'th century was it so that experiment can't explain itself.

The motive power of steam engines definitely made much for the study of aspects of the triple point of water, yet as well, accounts of pneumatics and the letter-tube delivery systems or even how a train locomotive makes its way up the tracks, for example from the World Factbook of 1846, make for theory meeting practice.

Here are some podcasts or video essays I recently recorded.

"Reading Foundations: double relativity" "Reading Foundations: continuous quanta"

Some books looked at include "The Grand Contraption" and "The Powers that Be".

Back to the idea of implementing a divider circuit, it's kind of funny that there isn't really a great example of an analog divider circuit that's sort of ideal and efficient, besides as for usual accounts of amplifiers and attenuators and so on. There are integrators and the like, accumulators, there's a place on the chart of ideal electrical components looking to be filled with a rational divider.