SOAR confusion

Should be a good fit. My impression of the Avtech stuff was that it was never very well engineered, but tinkered until it worked reasonably reliably.

The title of the SOAR graph clearly says Tc=25c.

Rds-on is typ 15 mohms, as shown in fig 6. The "limited by on-state resistance" line is 40m all the way from 0.25 watts to 1 KW.

I'll just blow some up and see what they actually do.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

That is the case temperature. The whole point of the SOA graph is to provide an indication of where parts of the die reach the maximum operating temperature.

At a die teperature of 25 C.

And how do you think Infineon measure the SOA?

Read the thermal instability paper by Berglio and Spirito.

But that's the external temperature, not the temperature of the conducting channel inside the device,

Because the conducting channel gets warmer when it is carrying more current. Resistance isn't supposed to be current dependent, but when there's enough current going through the conductor to warm it up, the temperature dependence of the resistance does come into play.

The channel resistance is not going to be a nice stable 40 mOhm at all currents, but the application engineer seems to have decided that 40 milliOhm was close enough

Thinking about what's actually going on inside the devices as you blow them up would let you get more information out of the exercise, but might diminish the emotional gratification.

What do you expect the die temp to be at 25c case temp and 0.25 watts dissipation?

When we tested a lot of big fets for our NMR drivers, we developed a different thermal model. It worked fine.

Here's our biggest amp.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Read the data sheet.

Lots of different models work adequately.

Why should we pay attention to the presence or absence of insulators?

Most FETs have lots of exposed metal so you can connect to gate, source and drain. The gate connection doesn't have to carry a lot of current except when the device is being turned on and off.

Insulators separate conductors that are carrying different currents, so they are inevitable - your "Note: no insulators" is nonsense on the face of it. You do need to learn to say what you mean, at least when you are pretending to say something informative.

The thermal resistance of the insulators on that amp is exactly zero.

The fets are clamped onto copper bars, which spread the heat into the aluminum heat sink.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

One good test is worth a thousand expert opinions.

- Wernher Von Braun

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

A little above 25 C. But what is your point?

The value of Rds in the curve is the value at max Tj and Vgs = 10V. That is industry standard practice.

But you say elsewhere :-

If you're not operating in the saturation region why are you even looking at the SOA curve?

Here's my little fet tester:

Gate drive is from a 50 ohm DDG, so it's kinda slow. We'll use a couple of beastly gate drivers on the real thing.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

What you should have said was that the thermal resistance of the electrical insulation between the FETs and the heat sinks on that amp is exactly zero because ...

Though it is "an" aluminium heat sink. There are bound to be others in the immediate vicinity.

It's sort of irrelevant, because because the thermal interfaces between the FETs and the eventual aluminium heatsinks are each contributing their own small temperature rise along the thermal path.

And the channel temperature isn't all that close to the 25C external ambient temperature - a point that you do seem to find hard to appreciate.

But it takes an expert to set up a good test, and to interpret the results correctly. The woods are full of people who don't test for the information they need to know, and misinterpret the results they thought that they had got.

What's the thermal mass of the resistive layer, and how long are the pulses? Thick film inks are conductive metal oxides which fuse into a sort of conductive glass when you get them hot enough, which sort of low red heat.

I once ended up specifying a 100 MOhm per square thick film ink to add a conductive layer to an alumina component to go inside an electron microscope. Without the resistive ink the alumina picked up a static charge from the imaging electrons, and that messed up their trajectories.

A hundred degrees or so of short term heating aren't going to get the resistive layer hot enough to melt. It might get it hot enough to expand a bit and generate mechanical stress, but if that stays inside the elastic range of the resistive ink and the ceramic on which it is sitting you won't get any long term effects (which would probably show up a drifts in the room temperature resistance).

As one does.

Because there are no insulators. The 16 p-channel fets and 16 n-channel fets are hard-clamped to the heat sink, which is the amp output node.

Not in my box.

The copper heat spreaders were machined very flat. Aluminum extrusions are typically not especially flat, so one can get serious air gaps against a big fet. The fets are very flat themselves.

Hold a big fet against a commercial aluminum heat sink and peek at it edgewise. You can usually see light through the gap.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Here's my test board.

That's only 1.8 watts per resistor. Well, 3600 watts peak if you want to get technical.

Thickfilms don't like big pulses.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Heat is not the problem, it's thermal fatigue.

"Thermal Fatigue: While the 1.125 W average load is well below the 35 W limit, repeating a 2,250 W thermal shock 250 times every second creates microscopic mechanical stress. Over millions of cycles, the film can micro-crack."

You have the same thermal fatigue failure effect with the FET, it's just going to take longer to show up.

Then take this with a grain of salt:

"Safety Margin Recommendation: For high-reliability designs running continuously for years, it is standard engineering practice to derate peak single-pulse energy limits by 50%. Dropping your maximum pulse peak power to 1,125 W (limiting your maximum peak current to ~33.5 A) will indefinitely eliminate the risk of micro-cracking."

Go with parallel 5x series 5.1R + FET combos.

It's your call, but your testing is inadequate at this point. Always better, and much easier, to overdesign, especially when parts are cheap.

Getting back to the thermal fatigue failure mode for MOSFETs, the simplest empirical method is to measure steady increases in RDS,ON as well as increases in the transient thermal impedance Ztheta.

"On-State Resistance (\(R_{DS(on)}\)): Thermomechanical degradation blocks the nominal heat path, accelerating internal hot spots. Tracking steady increases in \(R_{DS(on)}\) serves as a primary non-destructive signature for progressive die-attach cracking."

"Transient Thermal Impedance (\(Z_{th}\)): As fatigue cracks and micro-voids expand across the attach layer, the junction-to-case thermal resistance (\(R_{th\_jc}\)) escalates. Shifts in the structural thermal impedance curve reveal the exact health state of the die-attach stack."

Formal justification for which is explained in this complicated paper:

You don't need to worry about any of it if you stay away from Tj=175oC.

Nothing likes big pulses. With short pulses all the power dissipated in the resistor stays in the resistive element (a least for a few microseconds) and the question is how hot can you let the resistive element get before it expands enough to exceed the local elastic limit.

Thick films have a more massive resistive element than thin film resistors, but it is still a film. The aim is to have enough resistor area that none of it gets hot enough to get stressed to the point of irreversible mechanical movement. Putting in four equal value resistors as two parallel pairs in series would get you started. You could stack them on top of one another (if your rep rate was low enough). The sky is the limit.

Minimalist.

That's why people put zinc-oxide loaded silicone grease between components and heat sinks. It's not as conductive as metal, but it's a lot more conductive than air. It is also called "thermal contact compound" and 'heat sink grease" for the benefit of people like you.