Smps loop compensation question...

Hi everyone! I need some advice regarding closing the feedback loop of a halfbridge voltagemode smps. I need to calculate the power circuit gain. As far as I know, this is determined by taking transformer peak secondary voltage divided by modulator pwm-ramp amplitude. In my case, there are 2 secondary windings which both provides 75V peak (at 220Vac mains). So, 75 divided by 2.5 which is the pwm ramp amplitude, comes out to 30. Each secondary are connected to a fullwave buck-output filter and rectification. The error-amp is powered between both secondary rails. The supply will regulate at +/- 50Vdc. The error-amp is hooked up so it will actually "see" an output of both rails, which is 100V. (It's using -50Vdc as reference) So, to my question #1: As far as I can see, this arrangement results in doubled power circuit gain, correct? Question #2: Is there any other difference in placing the error-amp in this way compared to placing it just to "see" one of the rails and use secondary ground as reference. Excuse for describing this rather clumsy...Please forgive me for that. If there are any kind person out there who think he/she has the time to look into my questions, I'll gladly provide you with additional information if something's unclear in my description.

Best regards, Stefan

Reply to
Steve
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yes

yes, but it probably doesnt matter much, if the windings have the same number of turns and are tightly coupled. If OTOH they are not tightly coupled, then sensing a single supply can end up with one well regulated supply and one poorly regulated supply, whereas sensing across both makes them equally well regulated (you'll find that the overall error is kinda averaged between them)

the (voltage) gain of your power stage is pretty much as you say. Its a buck-derived converter, so the input-output equation (sans transformer) is Vout = Vin*D

You have a transformer in there, so the transfer function turns into

Vout = Vin*(Ns/Np)*D

Then you need to know the transfer function of your modulator, which is very simple:

D = Vea/Vramp_peak

Vea = error amplifier voltage

because you are comparing the error amplifier output voltage (or some fraction thereof) with a sawtooth of peak voltage Vramp_peak

putting it all together you get something like:

Vout/Vea = Vin*(Ns/Np)/Vramp_peak

which is, as you say, the peak secondary voltage divided by the peak ramp voltage.

Then of course you need to know the small-signal transfer function before you can stabilise it. but thats pretty well documented for a voltage-mode buck-derived converter.

You could always try the Injected-Absorbed Current methodology if Redl, Sokal et al for an easy way to work it out ;)

Cheers Terry

Reply to
Terry Given

Hi Terry. Thanks for your informative reply. I will simulate the regulation loop through SwitchCAD, and I was unsure about the power circuit gain.

Best regards, Stefan

Reply to
Steve

Yo Stefan......

I think you may have looked already but.....

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The sections on buck converters and offline conversion. Mind you, reading through it myself it's too much like heavy going. Anyway there is something in there that takes a diversion from current mode control to the possibility of voltage mode control and you might be able to hack some of the models.

The quick and dirty way is to design assuming some minimum ESR in your output filter capacitors. Inductor ripple current gets converted to a ripple voltage across that ESR and you can use 'slope matching' to find out what the maximum gain at the switching frequency can be through the rest of your loop.

You will need to know what that ESR is (maximum) and design to take its variation into account. Then you guess that the crossover frequency is going to be Fs/2pi and break the DC path around your error amplifier at some lower frequency. Like half of that divided by ESRmax/ESRmin and then add something in for gain variations in your opto-coupler.

Burble burble burble.

DNA

Reply to
Genome

Heey DNA! Long time no seen.

Indeed, been around into genomerics a hundred times. I really enjoy reading through. After a few years, my mind has come back to closing that feedback loop of a new halfbridge design. This time it's an IGBT design, operating at only 30kHz. I want to have a unity gain frequency of around 5-6kHz that's below 1/5th of the switching frequency. I try to use a type 3 error-amp. take a look at:

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Here's a plot of the loop response. Some details, I put a double zero at filter resonance freq, which is

130Hz. I keep high freq. gain in error amp low to achieve 5kHz crossover freq. This has resulted in that I have no chance of putting the first slope where I want it, due to components interact with eachother. Now it's actually below resonance freq... And I would suspect this is going to make things worse. Still, the plot looks quite good and I would think this thing would be stable. What do you say, DNA?
Reply to
Steve

Heey DNA! Long time no seen.

Indeed, been around into genomerics a hundred times. I really enjoy reading through. After a few years, my mind has come back to closing that feedback loop of a new halfbridge design. This time it's an IGBT design, operating at only 30kHz. I want to have a unity gain frequency of around 5-6kHz that's below 1/5th of the switching frequency. I try to use a type 3 error-amp. take a look at:

formatting link
Here's a plot of the loop response. Some details, I put a double zero at filter resonance freq, which is

130Hz. I keep high freq. gain in error amp low to achieve 5kHz crossover freq. This has resulted in that I have no chance of putting the first slope where I want it, due to components interact with eachother. Now it's actually below resonance freq... And I would suspect this is going to make things worse. Still, the plot looks quite good and I would think this thing would be stable. What do you say, DNA?
Reply to
Steve

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