I have a somewhat basic question on driving a H bridge: Assume the 4 switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), where R= right, L=left, T=top, B=bottom.
Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) while Q(R,T), Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T) & Q(R,B) are held OFF.
The drive is a square wave with some duty cycle. During the HI part of the drive, the switches are turned on as described above. But what happens during the LO part of the drive? Most of the circuits I have seen have all the switches turned OFF. But desnt it make more sense to keep the bottom switches ON and turn off the upper ones? This way inductive currents in the load have a path to dissapate, preventing spikes. This is particularly important if one is using an LC smoothing filter.
vkj.
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In a constant-voltage-supplied bridge (half or H style), all transistors must be off during commutation. Reverse protection diodes (intrinsic in MOSFETs, commonly provided within the package ("co-pack") for IGBTs) carry the inductive current back into the power supply.
Likewise, a constant-current-supplied bridge must turn all devices ON during commutation. (The analog of the cap-coupled half bridge is an inductively supplied push-pull inverter, which likewise has a high-pass cutoff frequency; the H-bridge still works down to DC.) The big difference in implementation is that, for constant-voltage inverters, an antiparallel diode is required to carry inductive current; for constant-current inverters, an anti-series diode is required to allow capacitive *voltage* to develop. This actually makes transistors completely unsuitable for this topology; SCRs and vacuum tubes are ideally suited, as they do not conduct in the reverse direction. (Vacuum tubes have the added benefit of not suffering from reverse recovery charge, allowing them to reach much higher frequencies. Unfortunately, they typically aren't rated for high reverse voltages. That said, a few hydrogen thyratrons could deliver a lot of power at fairly high frequencies.)
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
"vkj" wrote in message
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>I have a somewhat basic question on driving a H bridge: Assume the 4
> switches making up the bridge are Q(L,T), Q(R,T), Q(L,B), Q(R,B), where
> R=
> right, L=left, T=top, B=bottom.
>
> Typically, Q(L,T) & Q(R,B) are ON in the even cycles (say) while Q(R,T),
> Q(L,B) are OFF. In the odd cycles Q(R,T) & Q(L,B) are ON while Q(L,T) &
> Q(R,B) are held OFF.
>
> The drive is a square wave with some duty cycle. During the HI part of
> the
> drive, the switches are turned on as described above. But what happens
> during the LO part of the drive? Most of the circuits I have seen have
> all
> the switches turned OFF. But desnt it make more sense to keep the
> bottom
> switches ON and turn off the upper ones? This way inductive currents in
> the load have a path to dissapate, preventing spikes. This is
> particularly
> important if one is using an LC smoothing filter.
>
> vkj.
>
> ---------------------------------------
> Posted through http://www.Electronics-Related.com
Do you have a specific topology? All the ideal half-bridge SMPS's I've seen use at most 2 transistors... One generally acting as just an active diode. It almost sounds like you are talking about a motor controller.
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In any case, the reason almost surely has to do with prevent cross conduction.
Don't confuse drive methods with modulation methods - these are largely independent issues.
A full bridge can be modulated in a number of ways. Practicality will depend on the source and load characteristics. Not all drive methods are suited to all modulation requirements.
Those with unbalanced switching patterns can develop inconvenient common mode voltages in the load terminals and power absorption issues in the source.
You might look at 'ternary modulators' for examples of commercial applications of unbalanced modulation schemes. They go under various names - BGA (Amcron), DDX (STMicro), Pulsus PWM, Tripath - depending on application and vendor. As the typical application involves digital processing (which is not strictly neccessary - as the modulation scheme ideally doesn't require external intelligence), there are conrola and interface issues when loads won't run on piddly digital logic supplies. There's many a slip.
I agree that the rev. protection diode would direct the inductive remanents back to the supply/ground. (but note: not all MOSFETS have them). More importantly tho, the load would still see a +Vdd on one side. I SPICE simulated an SPWM and tried both approaches, and it makes a huge difference. Keeping the load floating during the OFF period results in a very distorted sine wave, while switching the transisors to ground results in a clean sine wave. It took me a while to figure out the problem. I havent yet got around to simulating a simple square wave driven SMPS, but I suspect the same principle works there too?
vkj
Q(R,T),
&
in
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In a simple square wave unipolar SMPS, there are issues when current in the filter inductor approaches or reaches zero. To permit current reversal, a synchronous switch might be used for the freewheeling position.
In a full bridge, there are few modulation methods that intentionally prevent the bridge arms from conducting in at least one of it's switch positions during the switching cycle.
Let me re-state my question: The basic drive signal for the Bridge is a square wave, ie its HI for a time and then LOW for the rest of its period. During the time when it is HI, the two diagonally opposite switches conduct alternately, thus the load sees a voltage of Vsupply alternately at each end.
My question is what happens during the LOW portion of drive signal? (a) Are all switches OFF (as most circuits show it)? or (b) Are the two bottom switches ON (and the top ones OFF), ie, shorting out the load? Clearly, for (a)the drive for the switches is simple (the diagonally opp. switches are driven with the same input), while (b) is a little more complicated.
I have simulated both (a) and (b) for an SPWM inverter, and it appears (b) is the correct way to do it. Havent yet gotten around to see what happens in a quasi sine wave or DC-output, transformer coupled configuration.
vkj
remanents
a
results
I
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You can do it that way; you at least have to make sure there is still sufficient dead time on each side's pair so they don't shoot through.
After that, any additional dead time is usually only for inductive circuits (usually resonant converters; strictly speaking, class D amps could have capacitive loads under some conditions so this cannot be guaranteed), where the current during turn-off can be carried by a dV/dt snubber, reducing switching losses.
When the load phase is unknown (capacitive or inductive), you will always achieve the most accuracy (in terms of output voltage) with a full wave output, which is enforced by, essentially, shorting the load between two same-level transistors (top or bottom).
The one drawback to your approach is it unfairly heats the bottom transistors. Ideally, the top pair should hold the load alternately. If you draw out the gate drive waveforms, you'll see this is called phase shift PWM.
PSPWM is very handy when you need a well-defined output voltage. Just leaving the bridge open-circuit lets the load ring down, usually slapping between the rails, delivering energy back into the supply and letting the load ring down in a nonlinear fashion. By always driving it with active transistors, you get a constant source impedance.
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
The drive signal for the switches is only a ~square wave after the modulator. Different modulation methods may require more than one drive signal to produce the intended performance from a full bridge
9H-bridge).
An H-bridge has two totem pole switch arrangements on either side of the filter/load. As a full bridge, it is capable of providing the full power rail in either polarity across the load as DC or an AC variation within those extremes, within the limits of the output filter's capabilities to meet the load's requirements. Not all loads are tolerant of differential-mode or common-mode ripple.
Basic modulation has the diagonally opposing switches seeing the same drive signals. 'Zero' load voltage is achieved when a 50% duty cycle is applied to both sides. If there is insufficient filtering, some or all of the full switching voltage waveform can still appear across the load under those 'zero'conditions. Whether this generates load current or power transfer will depend upon the load's characteristics.
If you didn't need to reverse the load polarity, you'd only use a half bridge, with the filter/load terminated on one of the rails, to provide a variable DC level. (This is effectively what you are doing whenever switches tied to the same rail conduct simultaneously.)
While a half bridge can be used to provide a capacitively coupled AC signal to a load, it cannot supply DC, unless a split supply with an independant DC return is available for each rail.
The modulation signals used may be pulse width modulated, phase modulated, ternary modulated, or any combination deemed suitable to the intended end use.
When both switches in a phase arm are off, only regenerative power absorption is possible ie the filter/load returns power to the source.
When switches on the same rail are on simultaneously, the only power transfer is between the freewheeling filter and the load.
When both switches in a phase arm are on simultaneously, the supplies are shorted.
Thanks. That makes sense. In the simulation, I found the output from a SPWM modulated input to be nothing near sinusoidal if the bottom switches werent turned on (during the LOW period). Clearly the inductor current in the output filter choke is the problem. When the bottom switches are turned on (during the LO part of the period) the change is very apparent. So Im guessing the same is true for a quasi-sine type inverter. I recently built the latter and my switching logic kept the MOSFETs OFF during the LO of the input, ie load floating. I didnt realize this could be a problem. So Im wondering whether I shd redo the logic.
vkj
(a)
Clearly,
complicated.
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Motors won't get the correct harmonics if the flat periods are open rather than shorted, but resistive and capacitive loads (most power supplies) won't care.
Wouldn't be surprised if this one simple change is all that's needed to make your average $20 inverter successfully drive motors..
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Exactly! This is the reason for my re-think -- A TRIAC controlled fan regulator breaks down when powered by my quasi-sine inverter, ie, the TRIAC conducts even without gate voltage. The drive for the inverter is the usual "open" type you refer to. Im seriously thinking of scrapping it and trying the "shorted" version.
vkj
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