Full Bridge SMPS mosfet selection criteria...

When selecting a Mosfet for a new full bridge (or half bridge) design, what criteria do you look for? Assume cost is not an issue and your looking for someting in a to-220 package.

VDS rating is fairly obvious.

How much do you overrate the current capacity of the device for reliable design?

What about the CISS, CRSS, and COSS?

in my application I have high voltage (300 - 600Vdc) but low power. The mosfet currently in use (IRFBG30) don't follow the gate signal at low output power levels on a full bridge design. When the gate turns off the voltage does not fall immediately and ramps linearly down not quite to half way before other side turns on.

I'm assuming this is the output capacitance of the msofets that are holding the volage after the channel is turned off and a fet with lower capacitance would be better.

This design is dreadfully inefficient in this mode. Its pulling 60mA at

500V (30W) to deliver 10W of power.

When the load is increased to 40W the fet signals clean up nicely and efficiency goes up in the 80% range.

I have checked the output inductor and it is not going discontinuous at the

10W load.

any thoughts? Lower Coss Fets or something else?

Oh magnatizing inductance of the primary is 20mH.

Reply to
mook johnson
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Double wrong. When selecting a MOSFET (or BJT or IGBT!) for a full bridge, I consider all possibilities. TO-220s are fairly weak things, only suitable for low power purposes (under 500W).

For something small (say, driving a pulse transformer), 2N4401/03 are fine. I wouldn't ordinarily consider power BJTs, so anything over half an amp I'd go looking for MOSFETs. Beyond that, higher voltages (more than 200V or so) benefit from IGBTs instead of MOSFETs. Anything else is simply whatever I pick.

For high amps (>50A) and low volts (< 100V), MOSFETs are the way to go. I'd be leery of using a single TO-220; maybe 50A each is more like it, or 100A each into a TO-247. Parallelled transistors reduces conduction losses, needing less heatsink (if any at all) and spreads out the stray inductance, making switching less traumatic.

Probably twice rated Ids(max) / Ice(max). Ratings are defined by the bond wires and thermal dissipation at 25C into infinite aluminum. Not a practical starting point. I always consider Rds(on) / Vce(sat) at whatever current I'm using, figure the dissipation (real dissipation is about half the peak value if you're driving a pure inductance, since it has a triangular current waveform, and half again for per- device duty cycle in a bridge) and select from there. TO-220's can dissipate 50W each into a well-cooled heatsink; TO-247's up to 100W. A pair of TO-220's, or a single TO-247 at 50W, is great for generic apps (moderate heatsink, no fan, etc.).

Secondary. Defines how much drive I need, which isn't usually much...

500mA peak from a 2N4401/03 complementary emitter follower is enough to kick most gates over in under 0.2us, which is enough for me.

As far as slew rate, I've only ever had *too much*. I have a fairly pedestrian gate drive which is still fast enough to drive IRG4PC50UD's (50A, 600V IGBTs) at rated speed (t_f =3D 80ns), and I have the waveforms to prove it. Problem is, all that dV/dt couples backwards along the high-side gate driver, making trouble at higher output voltages. I've had no problems with capacitance.



How much current does your load draw? Is it generally resistive, inductive or capacitive? Commutation is of course best into an at least partly inductive load.


Fun! You've created a class A switching supply! A class A amplifier has approximately constant power consumption, so that as output power rises, dissipation falls...


According to the datasheet, your IRFBG30s have about 160pF Cds (at Vds =3D 25V; the graph of course shows more below and less above, so you'll probably see it going real pokey just after a transistor turns off, then it accelerates along the middle). So delta 500V will contain ballpark 20uJ in each transistor, which is 20uJ * 4 every full cycle. At 50kHz (you didn't say what frequency, so I have to guess), that goes up to 4W, which is clearly not the source of your 30W dissipation (although it should be part of it). That's not counting your transformer's parasitic capacitance, of course, but even if it's 1nF, that won't push your consumption to 30W (although the 10W would still be a problem, but such a slow transformer is bad design to begin with).

I need more information about your circuit (like, all of it) to tell you anything specific.


Reply to
Tim Williams

Be carefull where you measure currents for power calculations, as errors are easy to introduce in pulse circuits, with varying waveforms of mixed frequency components.

Losses that accumulate to 20W in a small converter should be easy to locate, simply through temperature rises. This is particularly true if the power is being lost in the switches alone.

If this is just a DC transformer circuit, without pwm, a higher magnetizing current can ease switching at lower power levels. Any switching assistance that reduces the drain voltage to half Vcc or less, is doing it's job.

Using a fet rated above 800V in a 600V circuit is probably overkill. An IRFBE20 might work better here.

IGBTs might be suitable if the frequency isn't too high and freewheeling diodes are present. Off-line ballasts for flourescent lamps (to 20W) still use bipolar parts...


Reply to

Thanks for the replies.

The power stage looks like a classic half bridge powersupply

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Q1-Q4 are currently IRFBG30s D1-2 are the 600V 6A cree diodes. Primary inductance is 20mH. transformer ratio is 9.25:1 magnetics inc R material. Calculated core loss is

Reply to
mook johnson

Your drawing is a full bridge, a half bridge uses only two switches.

Both are overkill at 40W.

A half bridge is more likely to use the turns ratio specified, assuming 9.5/1/1 in the center-tapped full wave rectifier of the drawign, producing 65V reverse stress on the rectifiers at 600V input.

Using SiC rectifiers for a 12V output is also a bit puzzling. These are unavailable with ratings below 600V, and have forward voltages that are more than double conventional 100V parts. They should not aggravate light load switching, though.

In the conventional bridge circuit, normal freewheeling (without leakage effects) will produce 1/2 of the supply voltage on the switches during the non-conducting freewheeling interval. Leakage energy, under load, will only produce a spike to the opposing rails to dump this energy - with woltages returning to half supply in a ringing waveform (if unsnubbed).

The secondary effectively shorts the transformer in the freewheeling interval, as both rectifiers conduct, so the ringing frequency is determined mainly by primary leakage inductance and primary switch capacitance.

There is no possibility of near-zero-voltage switching through increased magnetizing energy. Techniques that do this use switching methods with continuous primary current, like phase modulation, rather than straight hard-switched pwm.

Check your gate drive integrity at light load. If this is transformer or capacitor coupled, there are many possible problems when attempting to produce narrow drive pulses. These can include poor off-bias maintenance and incomplete or linear conduction events.


Reply to

OOPS meant Full bridge not halfridge.

You are right it is 9.5:1:1. The SiC diodes were gifts from the Cree rep to show off the switching performance and zero reverse recovery. Regular fast sillycon diodes will likely replace then in the final design.

output is 24V not 12V. Doesn't matter much, just thought I'd mentinon it.

This is the effect I was expecting but unfortninately that not what I'm getting at light loads.

it looks like the top switches capacitor is not completely discharged when the bottom switch turns on and the bottom switch not only has to dissipate the energy of its own COSS but some if the top switces as well to finish charging. The opposite happend on the other end of the cycle.

Its transformer coupled with two secondaries and one primary. The secondaries are connected to diagonally opposing pairs on the H-bridge. I have noticed that the gate signals look sloppy both on the primary and secondary of the GDT but the 3rd party guy we got the design from says this is OK. :(

His chip has a 40 ohm output resistance that might be too high.

I might stiffen it up with a totmpole and see of that makes a difference as well.

Reply to
mook johnson


So, as legg said, why anything bridged? 40W is easy flyback territory. 500V is a bit steep for that, but they make FETs up to

1.5kV so that's still no big deal (although putting it across a TO-220 is a bit risky). But why 500V, where does that come from? No one uses a power line like that. Most supplies top out around 320VDC (1.4
  • 240VAC). So either this is a special use thing, or has a PFC front end, or you will be able to pick a suitable alternative, like a flyback.

It may also be advantageous to run slower. Dunno. If capacitive loss is dominating, and you can't reduce stray C, it may be worth the larger core size.


Reply to
Tim Williams

In this application I'm ont plugged into any sane power source. power supply rail will move from ~250 to 600VDC depending on what else is powered off that same bus.

I don't like flyback for this high of a voltage. Maybe 2 transistor flyback to keep the voltage to a reasonable level. might be a plan B but I think I can get this one clicking.

I'm considering that as well but (you guessed it) the box only allows space for this design so getting bigger components will be tricky but doable.


Reply to
mook johnson

I was going by your output current and power. At 3.2A, that becomes ~0W with a 24V output. It is also why I guessed the drawing was wrong vs the terminology.

Only the top switch on either side? Then this obviously points to gate drive irregularity. It's not an elementary job to drive high-side fets or two series fets (in this case, opposing bridge pairs)with the same timing. The slower fet will accumulate most of the residual charge of the floating transformer winding, as the last conducting node sling-shots the whole transformer winding closer to it's own rail.

The high-side gate drive circuit has a harder time with strays, as common-mode currents are mode converted in a manner that fights against fast switching transitions. It may play hell with higher impedance circuits using DC restoration in the drive signal, as well.

If you have any information re inductance, turns ratio, volt-second withstand and leakage terms for this transformer, it may clear up the suitability issue. Parts originally designed for 20KHz or 50KHz may not be suited to higher frequencies - same goes for the circuits surrounding them.

Concentrating on gate drive issues is probably worthwhile.


Reply to


nk I

In that case, why not half bridge? Half the loss of full bridge, and half the voltage so you don't need as big turns ratio. Fewer Npri =3D less Cpri. Still needs annoyingly isolated (>600V hipot) gate coupling transformer, but doesn't need quadruple secondaries. Regular old hookup wire on a suitable black (hi-mu) ferrite toroid works for me, though you'll probably want something more optimally encapsulated (smaller). You do need a coupling capacitor, or better yet, one split exactly in two between +V and "fake ground" and GND (reducing the startup transient).

You could probably replace half your bridge transistors with a capacitor the same size. A fair trade for lower losses.


Reply to
Tim Williams

I failed to mention it as 75W output supply at 24V.

Its both top nad bottom that do this at light loads. After the high side turns off, its source voltage hangs around for a while starts towards 1/2 Vbus. before it gets there, the low sdide turns on for its half of the cycle. When the low side turns off, the low side drain hange around zero voltage for a while then lazily approaches 1/2 Vbus befoer the top one turns on and yanks it to Vbus.

Ahhh the high side transformer.. I've fought this problem bofore with high side transformers on a motor drive which only has 1uS of dead time. When the low side FET turns on and pulls the source of the high side down quickly the secondary of that transformer has high dv/dt across the GDTs primary to secondary capacitance causing a common mode current spike from the low side into the high side. The source side get a shorted to the drain of the low side switch but the common mode current on the gate side of the secondary must go through the gate impedance. This was enough to turn on the high side fet for a sliver of time when the low side was turning on. needless to say a sliver of cross conduction occured and dissipation when up.

I had to do some ustom GDT trickery to divert this common mode current away from the gate and steer it all to the source pin. I'll have to look into doing this again. When looking at teh current in the bus filter capacitor there is a this current spike of about 700mA during hte switching at light loads. I though it was capacitive currents but it might be a bonified crossconduction current.

The GDTs are wound on some little pot cores. mag-inc 0p1408-ug I think. proably not the best for leakage inductance. I'll have to get one in the lab and see what the leakage inductance and pulse fidelity at sub 1us looks like. Like I said the gate signals do look sloppy. I think you're on to something.

Reply to
mook johnson

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