Slow Start Switched DC Output

LT1910 from linear, check out fig 5 in the data sheet

martin

--- View in Courier:

P CHANNEL MOSFET / /

| G | [C] | | | | | +--[ZENER>]--+ [1µF] | | [R] | | | GND>-------+------------------+----GND>

LTSPICE circuit list:

Version 4 SHEET 1 880 680 WIRE -128 144 -256 144 WIRE 32 144 -128 144 WIRE 176 144 128 144 WIRE 288 144 176 144 WIRE -128 176 -128 144 WIRE 176 256 176 144 WIRE 288 256 288 144 WIRE -128 288 -128 240 WIRE -80 288 -128 288 WIRE 48 288 48 192 WIRE 48 288 -16 288 WIRE -256 336 -256 144 WIRE -128 336 -128 288 WIRE -256 448 -256 416 WIRE -128 448 -128 416 WIRE -128 448 -256 448 WIRE 176 448 176 320 WIRE 176 448 -128 448 WIRE 288 448 288 336 WIRE 288 448 176 448 WIRE -256 480 -256 448 FLAG -256 480 0 SYMBOL res -144 320 R0 WINDOW 0 43 40 Left 0 WINDOW 3 38 69 Left 0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL cap -144 176 R0 WINDOW 0 -39 31 Left 0 WINDOW 3 -45 60 Left 0 SYMATTR InstName C1 SYMATTR Value 10e-6 SYMBOL voltage -256 320 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 28 0 1e-6) SYMBOL res 272 240 R0 SYMATTR InstName R2 SYMATTR Value 10 SYMBOL pmos 128 192 M270 SYMATTR InstName M1 SYMATTR Value Si7469DP SYMBOL zener -80 304 R270 WINDOW 0 24 90 VTop 0 WINDOW 3 5 112 VBottom 0 SYMATTR InstName D1 SYMATTR Value BZX84C15L SYMBOL cap 160 256 R0 WINDOW 0 43 29 Left 0 SYMATTR InstName C2 SYMATTR Value 1e-6 TEXT -242 466 Left 0 !.tran .1

-- JF

That ASCII art looks wrong to me. I assume the Zener's location is an error. The zener should be from the source to the gate.

You should also put a diode across the resistor. If the 28V input goes to zero and then back up to 28, the output would follow without delay. With the diode, the slow start would repeat.

This is certainly not the best way to do this (highly dependent on mosfet gm).

A prefered way would be using the fet as a miller integrator:

John Fields a écrit :

You're right: in a hurry I got it wrong and the integrator reference should have been GND, not the 28V input :-(

So:

.-------------. | | 28V >--+-------+-----+^+-----)----+--> out | | ||| | | | | === | | | | | | | 12V z | | 330K.-. | A 330K.-. .-. | | --- 10n | | | | | | | --- | | | | | '-' | | '-' '-'100R | | | | | | | '-------+-----+ .---+ | | | | | \\| | |/ | |-+-| | | | - | | | ^ | | | | | | +---+--------+ | | | .-. .-. - | | | | ^ 10K| | 10K| | | '-' '-' | | | | === === === GND GND GND

But you're still in error: your circuit is a current source, which means that the dv/dt depends on the load. Now make the output load 100R or 1K or 10K and see what happens.

On Wed, 09 May 2007 11:20:03 +0200, Fred Bartoli

wrote:

It still doesn't work:

Version 4 SHEET 1 880 804 WIRE -32 -80 -304 -80 WIRE 400 -80 -32 -80 WIRE -32 64 -32 -80 WIRE 64 64 -32 64 WIRE 160 64 64 64 WIRE 576 64 256 64 WIRE 688 64 576 64 WIRE -32 144 -32 64 WIRE 64 144 64 64 WIRE 176 144 176 112 WIRE 400 144 400 -80 WIRE 576 240 576 64 WIRE -32 256 -32 208 WIRE 64 256 64 224 WIRE 64 256 -32 256 WIRE 176 256 176 224 WIRE 176 256 64 256 WIRE 176 288 176 256 WIRE 400 288 400 224 WIRE 288 336 240 336 WIRE 336 336 288 336 WIRE 688 336 688 64 WIRE 288 400 288 336 WIRE 176 512 176 384 WIRE 288 512 288 464 WIRE 288 512 176 512 WIRE 576 512 576 304 WIRE 576 512 288 512 WIRE -304 560 -304 -80 WIRE 176 576 176 512 WIRE 400 576 400 384 WIRE 576 576 576 512 WIRE -304 704 -304 640 WIRE 176 704 176 656 WIRE 176 704 -304 704 WIRE 400 704 400 656 WIRE 400 704 176 704 WIRE 576 704 576 640 WIRE 576 704 400 704 WIRE 688 704 688 416 WIRE 688 704 576 704 WIRE -304 784 -304 704 FLAG -304 784 0 SYMBOL voltage -304 544 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 28 0 1e-6 1e-6 1 2) SYMATTR InstName V1 SYMBOL pmos 256 112 M270 SYMATTR InstName M1 SYMATTR Value Si7469DP SYMBOL cap 560 240 R0 SYMATTR InstName C2 SYMATTR Value 10e-9 SYMBOL res 672 320 R0 SYMATTR InstName R2 SYMATTR Value 100 SYMBOL npn 240 288 M0 SYMATTR InstName Q1 SYMATTR Value 2N3904 SYMBOL npn 336 288 R0 SYMATTR InstName Q2 SYMATTR Value 2N3904 SYMBOL diode 304 464 R180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL res 384 560 R0 SYMATTR InstName R1 SYMATTR Value 10k SYMBOL res 160 560 R0 SYMATTR InstName R3 SYMATTR Value 10k SYMBOL diode 592 640 R180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D2 SYMATTR Value 1N4148 SYMBOL res 160 128 R0 SYMATTR InstName R4 SYMATTR Value 100 SYMBOL res 384 128 R0 SYMATTR InstName R5 SYMATTR Value 330k SYMBOL zener -16 208 R180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D3 SYMATTR Value BZX84C12L SYMBOL res 48 128 R0 SYMATTR InstName R6 SYMATTR Value 330k TEXT -280 768 Left 0 !.tran 10

John Fields a écrit :

Except you've forgot the BC connection on Q2 (that's a current mirror). There remained a starting glitch removed by adding a 10n cap across the gate zener.

OK. Lower current = lower gm, which somewhat compensates for this... ... but most loads don't have a resistive behavior (higher dynamic impedance than static one).

Also you're still lacking a zener gate clamp, and the two antiparallel diodes serves not purpose... ...hmmm, I'd be curious that you explain how this is supposed to work.