If the fiducial generator will drive a low impedance, and if the width of the pulse is only 100ps, I'm sure there is some tricky transmission line transformer way to impose it in series with your arb output and maintain decent pulse shape. It would take some experimentation though.
Whatever switch you choose, I wonder what amount of glitch gets injected into the signal output when it switches (charge injection or whatever you want to call it).
I'm working with short, shaped pulses, so I want the switch to have good pulse fidelity within some fast time of switching.
ADRF5024 looks good. Its gross switching happens in under 10 ns and is pretty clean. In fine RF tradition, it's underspecified and specs are basically dishonest.
You may want to look the the switch through a TDR (Time domain reflectomter). That will give you the best measurement for switch's ability to maintain pulse fidelity.
What kind of transmission line are you running into the switches? Sometimes that can really affect your measurements.
For instance if you are running coplanar or microstrip and you have some components from the line to ground, they should be split equally to both sides of the line. Say your circuit had 100 ohm to ground, it should be 2 each 200 ohm to ground on both edges of the line so the currents split evenly. Make sure the ground current follows the same path as the signal, each being in different planes.
It's hard to build anything but a co-planar waveguide on a printed circuit board.
I have tried to get John Larkin to think about (buried) strip-lines, which you can bury inside multi-layer boards. Unlike structures on the surface, they can be non-dispersive. There's no way to suggest this in away that sounds flattering, so John isn't interested.
John Larkin doesn't like doing any thinking very much, and does much less of it than he should.
Anthony William Sloman snipped-for-privacy@ieee.org wrote in news: snipped-for-privacy@googlegroups.com:
I have done some stripline designs. Before I would move forward with your idea, which sounds good to me, btw, I would run it past my boss of over 30 years, and he is one of the top RF engineers on the planet (was).
Parts mount on the surface. Stripline traces are inherently several layers down. The connection to a stripline trace involves at least two vias. Vias are deadly for really fast signals.
Sloman pontificates and insults and hasn't designed actual electronics in decades, and what he did decades ago sounds mostly like failures.
We do a lot of multilayer test boards and real production boards. Experiment is a good check on guesswork theories.
And we're not designing RF, we're doing picosecond time domain stuff. Working around 10 GHz is different from DC-to-10GHz. We measure signal fidelity in PPM, not dB.
This drives the "slicer" section of a 2-stage e/o modulator:
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We've improved the monitor pickoff on the current rev. This fast stuff depends a lot on instinct and experiment, mostly because we don't have good, or usually any, time-domain part models. It's amazing how much we don't know about the parts we use.
Time and (wideband) frequency domain tests are nearly interchangeable. In a fast time domain test, a via typically looks like a capacitor. Vias can be carefully tuned to match a trace impedance, but a thru via overshoots the transition to a microstrip and makes a nasty little stub with a pad on both ends. Blind vias are better but run up board cost.
We usually keep our fast connections microstrip on layer 1, with ground plane as layer 2, and run power planes and slow stuff on layers below.
Ground vias are inductive, so we have big ground pours on layer 1 with a lot of vias down to the layer 2 ground plane.
Layout becomes a puzzle like doing single-sided boards in ancient times.
"RF" is usually narrowband, so parasitics can be tuned out.
If "designed" - which is to say fudged - buy John Larkin. It's extra inductance which can be neurtalised.
Cambridge Instruments fast stuff was mostly 1988 to 1991, and was a technical success and a commercial failure. I did at bit more at Nijmegen University around 1997. I cleaned up an old nanosecond pulse generator by replacing some of the TTL with ECLinPS, and got rid of a nasty sub-nanosecond jitter, which prompted the user to get us to design an ECLinPS-based replacement. We spent about a year doing the detailed design of the hardware and the software to run it, but the user ran out of funding at the point when we were starting on the layout. Not a successful development, but not a technical failure either.
The theories aren't guesswork, but experiment is a lot cheaper than simulations that are detailed enough to be all that reliable.
And so was I.
We were producing 500psec wide pulses from about 1985. Your scope image is of a 4nsec wide pulse.
And don't seem to be able to find out. Models are what you put together to fit experimental data. Manufacturers often do it for you.
LTSpice frequently gives access to some manufacturers part models, but when I've used the BFR92 I've had to import the NXP Gummel Poon model myself.
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