Reverse voltage on a diode (forward converter)

Without having examined it in excruciating detail, your logic looks right to me. People who publish ap notes (and data sheets!) do make mistakes; I find them all the time. Sometimes the author is to blame, and sometimes the people who pretty up the equations and figures for publication are the culprits. When I report errors I even occasionally get a thank-you back.

You do want to allow for the inevitable nonidealities in the system, of course--things like leakage inductance, the effects of switches that have significant on resistance and lots of off capacitance, the effects of resistance in the output choke, the output ripple voltage, ... I've found that it's quite possible to build a very decent SPICE model of a switcher if you spend a bit of time characterizing the components for their parasitic effects; I've gotten quite respectable predictions of actual ringing frequencies, amplitudes and damping of leakage inductances with intended and parasitic capacitances, for example.

You could toss together a Spice model of the idealized circuit in the ST ap note quite easily and, using a low voltage so that Vf is a significant fraction of the secondary peak voltage, demonstrate that the ap note is either incorrect or correct. Suggest you give that a try.

Cheers, Tom

So did I. Occasionally people where even shocked when I pointed out a major booboo. However, most of the time a datasheet or app note was not corrected. I don't get that. It's almost as if you tell someone that there is smoke coming from under the hood and they just keep on driving.

Having now examined it in a bit more detail (forced by looking at a simulation output ;-), I can suggest that you consider your point 2 more carefully. Realize that it is indeed a square wave, but it goes negative by Vf when the switch is off--that is, when D2 is forward biased. That means that to get the average voltage over a cycle at the inductor input to be equal to the output voltage, the peak voltage at that point must go higher than Vout/dutyfactor. In fact, it must go higher by Vf*(dutyfactor-1), I believe...so then it spends dutyfactor at Vout/dutyfactor + Vf*(dutyfactor-1) and (dutyfactor-1) at -Vf. Does that help?

Cheers, Tom

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Cripes, belay that. The last part should read (barring more slips on the mental gymnastics bar):

high voltage at inductor input =3D (Vout + Vf*(1-dutyfactor))/dutyfactor =3D D2 peak reverse voltage low voltage at inductor input =3D -Vf Average voltage at inductor input =3D high * dutyfactor + low * (1-dutyfactor) =3D Vout + Vf*(1-dutyfactor) - Vf*(1-dutyractor) =3D Vout as expected.

Cheers, Tom

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HI Tom,

Thanks for your previous post. I can see what you are doing and agree that the Vf should be included for completeness.

I have looked at your workings and can manage to verify them to be correct from first principles only when Vf is negative. eg Average=3Darea under curve/length of base etc...

When I tried to start from first principles myself I get something that concurs with your result eg Vpeak =3D [[vout+vf]/dutyfactor]-vf (ignoring lekage L spikes)

However your line "high voltage at inductor input =3D (Vout + Vf*(1- dutyfactor))/dutyfactor" I believe is a little confusing as you are adding a negative term there fore you are subtracting.

In effect you are reducing the on area by the off area.

I think it should read "high voltage at inductor input =3D (Vout - Vf*(1- dutyfactor))/dutyfactor" for clarity, but I am picking at straws!

This result would suggest that the max reverse voltage on D2 occurs when the duty factor =3D min, when duty factor is min primary voltage is at max, so this concurs with step 8 of mine above.

Now if duty factor =3D 0.01 the term (Vout - Vf*(1-dutyfactor))/ dutyfactor becomes very large, practically too large for the input voltage and the turns ratio to produce.

Say vout =3D 25V Vf=3D0.3 the term above =3D [25-(0.3x0.01)]/ 0.01 =3D 2499.=

Practically I don=92t know what to specify for the min duty factor in a real circuit so I couldn=92t work out max reverse voltage on the diode using your method.

Am I talking twaddle or am I making sense?

Reggie.

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Huh?? Vf is positive; typically about half a volt for Schottkys near their max current. That is, during the time that D2 is conducting, the voltage at the input to the inductor is NEGATIVE by Vf. Then when the transformer is supplying energy, the voltage at the inductor input must be more positive by an amount to make up for that, if you will.

Nope, adding. The voltage must be HIGHER because during the transformer "off" time the voltage to the inductor input was negative.

Well, another way to look at it is that the voltage out of the transformer, neglecting effects of resonances and leakage inductances and the like, is the primary voltage times the turns ratio, and the reverse voltage across the freewheeling diode is that voltage minus the forward drop of the diode connected from the transformer to the inductor. Start with the basics: what's the input voltage range? What output voltage and current do you need? You can then play with different turns ratios to check out max and min duty factors, and from those, figure the peak voltages and currents. For an ideal case, you can do all that with a spreadsheet. Or--use something like LTSpice.

Cheers, Tom

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Hi Tom,

I have made a mistake! I have looked again at what you have said and I do agree with your explanation (I copied your maths down incorrectly from the web) sorry. What I had copied down was wrong not your response to my original question.

However my original workings still stand, just the way I went about it was different from you. Imagine the actual waveform across D2 with negative value during toff and positive waveform during ton. I averaged the waveform as it is, but using a negative sign for the area Vf.(1-dutyfactor)T

Eg:

Average voltage =3D vout =3D area under curve / length of base

Average voltage =3D vout =3D [high area =96 low area] / length of base

(high voltage at inductor input =3D Vpkdiode)

Average voltage =3D vout =3D [ton. Vpkdiode =96 toff . Vf] / length of base

Average voltage =3D vout =3D [Dutyfactor.T. Vpkdiode =96 (1- dutyfactor)T.Vf] / T

Solve for Vpkdiode

Vpkdiode =3D ((Vout+Vf)/dutyfactor) - Vf

This gives the same result as your :

high voltage at inductor =3D [Vout + Vf (1-dutyfactor)]/dutyfactor

The important points that you covered are to maintain the same Volt seconds across the coil over one period (otherwise it will saturate), which is the same thing as saying the input average voltage has to equal the output average voltage (which is of course vout).

Correct me if I am wrong but I think you have averaged both the high area and the low area (with their corresponding times), added them together to give a total increased average. You then divide this average by the dutyfactor to give the (high voltage at inductor input =3D Vpkdiode)

Your taking into account the negative voltage at the input to the inductor and compensating for it theoretically is accurate, but in practice wont the duty factor compensate for the small inaccuracies introduced by neglecting this negative value? I know if the output voltage is smaller the errors will be a bigger percentage and more problematic.

Also when you are modelling leakage inductance to predict spike frequency and amplitude, how do you take into account track inductances / capacitances before you have designed the PCB? Or do you assume good practice PCB design rules to minimise track parasitics?

Say for a 24V output will the error on the diode reverse voltage specification be larger or smaller than the leakage inductance spike? I am not sure, but I bet the leakage inductance spike will be bigger than the error introduced by neglecting the negative voltage across D2s effect on reverse voltage, what do you think?

I take your point about min duty and doing a spreadsheet.

Once again sorry for my mistake,

I hope I have explained myself clearly this time.

Reggie.

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Vpeak

ink

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or

Hi Tom,

I have made a mistake! I have looked again at what you have said and I do agree with your explanation (I copied your maths down incorrectly from the web) sorry. What I had copied down was wrong not your response to my original question.

However my original workings still stand, just the way I went about it was different from you.

Imagine the actual waveform across D2 with negative value during toff and positive waveform during ton. I averaged the waveform as it is, but using a negative sign for the area Vf.(1-dutyfactor).T

Eg:

Average voltage =3D vout =3D area under curve / length of base

Average voltage =3D vout =3D [high area - low area] / length of base

(high voltage at inductor input =3D Vpkdiode)

Average voltage =3D vout =3D [ton. Vpkdiode - toff . Vf] / length of base

Average voltage =3D vout =3D [dutyfactor.T . Vpkdiode - (1 - dutyfactor).T=83n. Vf] / T

Solve for Vpkdiode

Vpkdiode =3D ((Vout+Vf)/=83n dutyfactor)-Vf

This gives the same result as your :

high voltage at inductor =3D [Vout + Vf (1 - dutyfactor)] / dutyfactor

The important points that you covered are to maintain the same Volt seconds across the coil over one period (otherwise it will saturate), which is the same thing as saying the input average voltage has to equal the output average voltage (which is of course vout).

Correct me if I am wrong but I think you have averaged both the high area and the low area (with their corresponding times), added them together to give a total increased average. You then divide this average by the dutyfactor to give the (high voltage at inductor input =3D Vpkdiode)

Your taking into account the negative voltage at the input to the inductor and compensating for it theoretically is accurate, but in practice wont the duty factor compensate for the small inaccuracies introduced by neglecting this negative value? I know if the output voltage is smaller the errors will be a bigger percentage and more problematic.

Also when you are modelling leakage inductance to predict spike frequency and amplitude, how do you take into account track inductances / capacitances before you have designed the PCB? Or do you assume good practice PCB design rules to minimise track parasitics?

Say for a 24V output will the error on the diode reverse voltage specification be larger or smaller than the leakage inductance spike? I am not sure, but I bet the leakage inductance spike will be bigger than the error introduced by neglecting the negative voltage across D2s effect on reverse voltage, what do you think?

Once again sorry for my mistake,

I hope I have explained myself clearly this time.

I take your point about min duty and doing a spreadsheet.

Reggie.

ion)

iode

Vpeak

ink

ge

or

Hi Tom,

I have made a mistake! I have looked again at what you have said and I do agree with your explanation (I copied your maths down incorrectly from the web) sorry. What I had copied down was wrong not your response to my original question.

However my original workings still stand, just the way I went about it was different from you.

Imagine the actual waveform across D2 with negative value during toff and positive waveform during ton. I averaged the waveform as it is, but using a negative sign for the area Vf.(1-dutyfactor).T

Eg:

Average voltage =3D vout =3D area under curve / length of base

Average voltage =3D vout =3D [high area - low area] / length of base

(high voltage at inductor input =3D Vpkdiode)

Average voltage =3D vout =3D [ton. Vpkdiode - toff . Vf] / length of base

Average voltage =3D vout =3D [dutyfactor.T . Vpkdiode - (1 - dutyfactor).T=83n. Vf] / T

Solve for Vpkdiode

Vpkdiode =3D ((Vout+Vf)/=83n dutyfactor)-Vf

This gives the same result as your :

high voltage at inductor =3D [Vout + Vf (1 - dutyfactor)] / dutyfactor

The important points that you covered are to maintain the same Volt seconds across the coil over one period (otherwise it will saturate), which is the same thing as saying the input average voltage has to equal the output average voltage (which is of course vout).

Correct me if I am wrong but I think you have averaged both the high area and the low area (with their corresponding times), added them together to give a total increased average. You then divide this average by the dutyfactor to give the (high voltage at inductor input =3D Vpkdiode)

Your taking into account the negative voltage at the input to the inductor and compensating for it theoretically is accurate, but in practice wont the duty factor compensate for the small inaccuracies introduced by neglecting this negative value? I know if the output voltage is smaller the errors will be a bigger percentage and more problematic.

Also when you are modelling leakage inductance to predict spike frequency and amplitude, how do you take into account track inductances / capacitances before you have designed the PCB? Or do you assume good practice PCB design rules to minimise track parasitics?

Say for a 24V output will the error on the diode reverse voltage specification be larger or smaller than the leakage inductance spike? I am not sure, but I bet the leakage inductance spike will be bigger than the error introduced by neglecting the negative voltage across D2s effect on reverse voltage, what do you think?

Once again sorry for my mistake,

I hope I have explained myself clearly this time.

I take your point about min duty and doing a spreadsheet.

Reggie.