"Reduce Circuit Zapping From Cosmic Radiation"

Did you know this?:

Sep 1, 2007 Reduce Circuit Zapping From Cosmic Radiation:

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Quote: "... About 90% of high-energy particles at ground level are neutrons. ... For example, the wide bandgap of silicon carbide makes it much more radiation hardened than conventional silicon. Diodes are also less susceptible to SEB than MOSFETs and IGBTs, but they are still susceptible. ... Like semiconductor technology, the applied voltage stress has a significant effect on the SEB failure rate. Increasing the applied voltage greatly increases the probability of SEB failures. Conversely, decreasing the applied voltage greatly increases reliability, as will be shown. ..."

Glenn

Reply to
Glenn
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In the words of Johnny Carson, "I did NOT know that!"

Thanks for the heads up. Additionally will have to put aluminum hats over all my electronics. ;)

Reply to
RobertMacy

Read about the early history of DRAM, and the plague of (alpha) particle induced errors, until folks figured out their ceramic packages were doing them in (producing those nasty alphas).

One of the kickers in the story is one of the few producers of low-emission ceramics? Coors. Coors Ceramics, actually.

Reply to
artie

[snip]

Did learn about Single Event Breakdown the hard way :-( Had once designed a high voltage power supply which used 2.5 kV IGBTs. Did work perfectly, but when it was used in a radiation area, once in a while an IGBT failed apparently for no reason. However it hit the IGBT sustaining the highest voltage and happened under high radiation levels

-> SEB. It's - as I also found out - a quite well described phenomenon in the scientific literature, but a rather exotic issue, because under ordinary sea-level conditions it seems to drown in other failure modes. So it does not receive (and probably doesn't need) much attention by the electronics community. Only when dealing with high voltage devices and elevated radiation levels it becomes a practical issue.

Klaus

Reply to
Klaus Bahner

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I remember that Xilinx a some point had problems with some flipchip FPGAs the solder balls were made of the wrong type of lead and the radiation caus ed SEUs

-Lasse

Reply to
Lasse Langwadt Christensen

Xilinx has a couple of papers on radiation and mitigation of SEUs.

Cheers

Reply to
Martin Riddle

--snipped due to aioe.org --

Well, then design ad run circuits at 0.700 volts Vcc..

Reply to
Robert Baer

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