The background presentation in the paper is somewhat abbreviated because the authors are implicitly assuming the reader is participating in an ongoing discussion of fundamental limitations of I/O throughput due to channel, architectural, and power efficiency considerations. Both power equations are of the form V*I where V is DC power supply for the individual channel circuit driver and I is the current switched into the line termination *at the destination* , making this is a calculation of power supplied by the DC supply that is dissipated in the termination at the destination. In the case of HCM the channel driver is powered by Vdd, making V=Vdd, and the current switched from it into the line is I=Vswing/Zo, where it is assumed the line is terminated in a matched resistive impedance Zo, so that P=Vdd*Vswing/Zo. In the case of LCM, the channel driver is powered by a DC supply of magnitude Vswing and the driver is a series terminated circuit, by the MOSFET triode region channel resistance, putting Vswing/2 on the Zo termination at the destination. Therefore, for LCM, V=Vswing and I=(Vswing/2)/Zo. This may seem inconsistent with the HCM equation but it is not when you understand that the assumption in both cases is that the receiver equalization makes I*Zo=Vrx/H(f). This confusion is just a scale factor anyway and does not affect the calculation in section II for minimum energy per bit versus data rate gamma*f over channel H(f).