For small N this can be made work very nicely.
Existing cache hardware on Pentiums still isn't quite good enough. Try probing its memory with large power of two strides and you fall over a performance limitation caused by the cheap and cheerful way it uses lower address bits for cache associativity. See Steven Johnsons post in the FFT Timing thread.
If it is anything like the development of OS/2 you get to see very bright guys reinvent things from scratch that were already known in the mini and mainframe world (sometimes with the same bugs and quirks as the first iteration of big iron code suffered from).
NT 3.51 was a particularly good vintage. After that bloatware set in.
CPU cycles are cheap and getting cheaper and human cycles are expensive and getting more expensive. But that also says that we should also be using better tools and languages to manage the hardware.
Unfortunately time to market advantage tends to produce less than robust applications with pretty interfaces and fragile internals. You can after all send out code patches over the Internet all too easily ;-)
Since people buy the stuff (I would not wish Vista on my worst enemy by the way) even with all its faults the market rules, and market forces are never wrong...
Most of what you are claiming as advantages of separate CPUs can be achieved just as easily with hardware support for protected user memory and security privilige rings. It is more likely that virtualisation of single, dual or quad cores will become common in domestic PCs.
There was a Pentium exploit documented against some brands of Unix. eg.
Loads of physical CPUs just creates a different set of complexity problems. And they are a pig to program efficiently.
Regards, Martin Brown
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