pmos won't switch off cleanly

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

You've got too big a FET or too small a drain load. 5k times 400 pF Cout gives a 2 microsecond decay time constant. (Those smaller steps are V_GS coupling into the drain via C_DG.)

Cheers

Phil Hobbs

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

The positive spike is the gate feeding thru the gate-drain capacitance to the output. The rampish thing is the effective drain capacitance and the 5K. the negative pointy thing is the gate drain capacitance in the other direction. What does R2 do?

nction generator to the gate, it's going from 0 to 10V, I've got the Source= pulled up to 10V, and a load resistor of 5k on the Drain... it turns on qu= ick! I see my full voltage across the load, no problem... ohhhh but that tu= rn off is ugly... and it starts acting this way at around 10Hz, I've driven= it to 200kHz and just watched the ugliness of the turn off...

t in LTSpice and it is just as ugly (as long as I don't use the default ide= al pmos) it actually mimics what I see on the scope pretty good.

down the channel in the mosfet fast enough... here's a screenshot of what = I'm talking about

nt=3Dcrap.jpg

R2 doesn't do anything, I was thinking about driving the FET from an open c= ollector/drain so R2 would be the pull up in that case, I just got use to d= rawing it in there.

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

That fet has a lot of capacitance between its various pins. Try driving a smaller load resistor... that will make things look better. If you intend to drive 5K, use a smaller fet or a small PNP transistor.

tion generator to the gate, it's going from 0 to 10V, I've got the Source p= ulled up to 10V, and a load resistor of 5k on the Drain... it turns on quic= k! I see my full voltage across the load, no problem... ohhhh but that turn= off is ugly... and it starts acting this way at around 10Hz, I've driven i= t to 200kHz and just watched the ugliness of the turn off...=20

in LTSpice and it is just as ugly (as long as I don't use the default ideal= pmos) it actually mimics what I see on the scope pretty good.

own the channel in the mosfet fast enough... here's a screenshot of what I'= m talking about

=3Dcrap.jpg

Thanks for the responses, is this that dV/dt shoot through stuff I've heard= about? I don't know anything about what that is, but I've heard it causes = some FET failure... or is this something else?

nction generator to the gate, it's going from 0 to 10V, I've got the Source= pulled up to 10V, and a load resistor of 5k on the Drain... it turns on qu= ick! I see my full voltage across the load, no problem... ohhhh but that tu= rn off is ugly... and it starts acting this way at around 10Hz, I've driven= it to 200kHz and just watched the ugliness of the turn off...

t in LTSpice and it is just as ugly (as long as I don't use the default ide= al pmos) it actually mimics what I see on the scope pretty good.

down the channel in the mosfet fast enough... here's a screenshot of what = I'm talking about

..

rd about? I don't know anything about what that is, but I've heard it cause= s some FET failure... or is this something else?

Shoot-through happens when you connect your load both to the positive rail with a P-channel MOSFET and and to the negative rail with an N- channel MOSFET. If you start turning one on before the other one has finished turning off, they short the rails for a bit.

Not a good idea.

You need to read your MOSFET data-sheets carefully and look for the "gate charge" versus "gate voltage" curve.

It's figure 7 in the data sheet for the FDC5614.

and it tells you that you have to shift something like 10nC into or out of the gate when turning the device from on to off and vice versa.

Vital information.

-- Bill Sloman, Nijmegen

tion generator to the gate, it's going from 0 to 10V, I've got the Source p= ulled up to 10V, and a load resistor of 5k on the Drain... it turns on quic= k! I see my full voltage across the load, no problem... ohhhh but that turn= off is ugly... and it starts acting this way at around 10Hz, I've driven i= t to 200kHz and just watched the ugliness of the turn off...=20

in LTSpice and it is just as ugly (as long as I don't use the default ideal= pmos) it actually mimics what I see on the scope pretty good.

own the channel in the mosfet fast enough... here's a screenshot of what I'= m talking about

=3Dcrap.jpg

Thanks all, this is starting to make sense... so it sounds like I'm making = an RC time constant that is to large for my frequencies of interests... or = almost an frequency from what I'm lookin at on my bench. I've got a couple= follow up questions

1. What capacitance is it that I'm creating the RC time constant with? Is = it something listed on a typical datasheet?
2. Besides switching out the fet, is there something I could do to this cir= cuit to make it switch off faster?

oh, this is the datasheet to the real fet I'm actually working with

thanks

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

RC time constant that is to large for my frequencies of interests... or almost an frequency from what I'm lookin at on my bench. I've got a couple follow up questions

something listed on a typical datasheet? gate capacitance, gate charge.

circuit to make it switch off faster?

Use active hi-side gate driver. Use auxiliary voltage above supply for it.

unction generator to the gate, it's going from 0 to 10V, I've got the Sourc= e pulled up to 10V, and a load resistor of 5k on the Drain... it turns on q= uick! I see my full voltage across the load, no problem... ohhhh but that t= urn off is ugly... and it starts acting this way at around 10Hz, I've drive= n it to 200kHz and just watched the ugliness of the turn off...

it in LTSpice and it is just as ugly (as long as I don't use the default id= eal pmos) it actually mimics what I see on the scope pretty good.

g down the channel in the mosfet fast enough... here's a screenshot of what= I'm talking about

...

ing an RC time constant that is to large for my frequencies of interests...= or almost an frequency from what I'm lookin at on my bench. =A0I've got a = couple follow up questions

h? Is it something listed on a typical datasheet?

circuit to make it switch off faster?

That isn't necessary for a P-channel MOSFET with its source tied to the positive rail. It does make sense if you want to use an N-channel MOSFET in the same place, as many do for good economic reasons - they are a cheaper.

The "gate charge" curve is called "gate drive dynamic characteristic" on this data sheet, and it's at the bottom of page 4, on the right hand side.

-- Bill Sloman, Nijmegen

function generator to the gate, it's going from 0 to 10V, I've got the Sou= rce pulled up to 10V, and a load resistor of 5k on the Drain... it turns on= quick! I see my full voltage across the load, no problem... ohhhh but that= turn off is ugly... and it starts acting this way at around 10Hz, I've dri= ven it to 200kHz and just watched the ugliness of the turn off...

cuit in LTSpice and it is just as ugly (as long as I don't use the default = ideal pmos) it actually mimics what I see on the scope pretty good.

ing down the channel in the mosfet fast enough... here's a screenshot of wh= at I'm talking about

re...

aking an RC time constant that is to large for my frequencies of interests.= .. or almost an frequency from what I'm lookin at on my bench. =A0I've got = a couple follow up questions

ith? Is it something listed on a typical datasheet?

is circuit to make it switch off faster?

it.

in this case it is not the gate drive that is the issue, if you look at the spice sim the gate is driven with an ideal voltage source

the problem is the 5K load if it was 50R it would work

-Lasse

Given that you're simulating this with a perfect voltage source, you're looking at the drain-source capacitance, or possibly drain-gate.

As suggested: lower your load resistance. An alternate would be to use a half bridge -- that would potentially switch much faster, while giving you an opportunity to learn about shoot-through first hand.

But unless you have some need to switch lots of currents (presumably for different loads), I'd use a different device. I'd find some little, fast transistor, probably bipolar rather than FET, and then I'd lower R1 as necessary to make up the speed that I wanted.

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

I just wish people could use their own personal web page which is provided by most ISP's

That site there is full of scripts that just lock and stall and try like hell to lure you into crap you don't want..

Jamie

a function generator to the gate, it's going from 0 to 10V, I've got the S= ource pulled up to 10V, and a load resistor of 5k on the Drain... it turns = on quick! I see my full voltage across the load, no problem... ohhhh but th= at turn off is ugly... and it starts acting this way at around 10Hz, I've d= riven it to 200kHz and just watched the ugliness of the turn off...

ircuit in LTSpice and it is just as ugly (as long as I don't use the defaul= t ideal pmos) it actually mimics what I see on the scope pretty good.

aking down the channel in the mosfet fast enough... here's a screenshot of = what I'm talking about

urre...

making an RC time constant that is to large for my frequencies of interest= s... or almost an frequency from what I'm lookin at on my bench. =A0I've go= t a couple follow up questions

with? Is it something listed on a typical datasheet?

this circuit to make it switch off faster?

r it.

That was the point I was making by reminding panfilero about gate charge. It's more usually a problem to drive enough charge into the gate than to get rid of it from the drain, but it's the same charge on either side of the gate dielectric.

-- Bill Sloman, Nijmegen

generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

about? I don't know anything about what that is, but I've heard it causes some FET failure... or is this something else?

Just picture an imaginary capacitor between the Gate and drain. Actually, its more real than imaginary but, what is taking place is you are charging up the cap while in the on state because the gate is going to ground or low. When you switch off the gate by putting (+) bias voltage in your case on the gate, it actually creates a short voltage boost which accounts for that little peek you see there and the 5k ohm load R then gradually drains it down.

The little peek you are seeing is the sum of the (+) gate voltage and what was difference between the gate and drain when it was on. This is a charge pump effect. It's like putting two or more cells in series which multiplies the voltage.

If you want it to turn off faster on the output then employ a NMOS on the low side and have it directly driven from the high state of the uP output. Connect the Drain of that to the load node. THere will be a little shoot through, which means the two will be conducting at the same time as they switch states. That can be ironed out with careful selection of gate networks to set the gate threshold voltages.

Jamie

On Thu, 23 Aug 2012 12:50:35 -0700, panfilero wrote: [snip]

There are several app notes out on the web that explain all the structure and charge paths you are dealing with on a power mosfet.

google power mostfet or power mosfet driver or some such keywords and you will probably get many hits.

function generator to the gate, it's going from 0 to 10V, I've got the Source pulled up to 10V, and a load resistor of 5k on the Drain... it turns on quick! I see my full voltage across the load, no problem... ohhhh but that turn off is ugly... and it starts acting this way at around 10Hz, I've driven it to 200kHz and just watched the ugliness of the turn off...

LTSpice and it is just as ugly (as long as I don't use the default ideal pmos) it actually mimics what I see on the scope pretty good.

the channel in the mosfet fast enough... here's a screenshot of what I'm talking about

collector/drain so R2 would be the pull up in that case, I just got use to drawing it in there.

You think it's bad now, wait till you try to drive it with a current. Look up Miller capacitance.

That's what design engineering is all about, the eradication of parasitic elements.

If it was that easy, any one could do it. That would simply be unacceptable.

Jamie

re...

If you could eradicate Miller capacitance, life would be a lot easier.

In fact engineering is about coping with parasitic elements - if there was a universal DDT for electronic bugs, we could probably all retire.

Jamie suffering from delusions of competence, again.

-- Bill Sloman, Nijmegen

No more than you trying to make every one believe you're something that you are not and most likely never was.

Ever hear the phrase "You couldn't hold a candle"

Jamie