That isn't true. A filter can fill in a cycle or two. It can remove the side bands that represent the rapid AM modulation to zero. Another way to think of it is a tuned circuit with a high Q can make a continuous output if it only gets driven on every other cycle.
I was doing it with TACAN receivers in the mid '60's.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Terminology, please. Is a multiplying PLL a clock-multiplying PLL? Or do you mean a multiplying phase detector, mentioned earlier? The fed-back sawtooth does which?
In the mid '60's we were well into the integrated circuit era (Motorola SPD).
Now in the mid '50's I was building tube stuff.
...Jim Thompson
-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |
formatting link
| 1962 | I love to cook with wine. Sometimes I even put it in the food.
In 1955 I was in 9th grade. (Last year of "Junior High", now called Middle School.)
My father owned a hardware store and a radio/TV repair shop, so I had all kinds of goodies available. In 1956 my father became a Raytheon wholesaler, so I then had CK722's and CK760's as well ;-)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Lucky SOB. I remember I spent an entire month's earnings in '57 from a paper route making a transistor headphone amp for a crystal set -- yes, with galena and a catswhisker. The device was in fact a CK722.
I dug through the junk box and came up with an LM565 and a zillion 567s. I never really studied the 567's schematic before but there it is, a balanced modulator. 565, too.
"No and if I told you where I saw it used ... I'd have to kill you."
Its an old joke and in this case not really true but since I don't own the design and don't have contact with the owner, It isn't likely I'll be able to prvide a link.
Ok, I'll try to be clear, although this is a Monday:
Assume you have a VCO running at several times the input frequency. ie: a "multiplying PLL".
It is a fairly easy matter to filter the input signal so that it has no components above some fraction of the VCO's frequency. The filter really should remove the 3rd harmonic of the expected frequency and above.
The VCO's output can be made into a (not super good) sawtooth with a simple low pass filter.
If the input signal is connected to one input of a comparitor and the other side of the comparitor is driven with a scaled version of the sawtooth, you get a PWMed output from the comparitor. If the sawtooth's amplitude is adjusted so that it is just a little bigger than the biggest signal, the PWM doesn't saturate.
Now when this PWM train goes through the XOR, you get a bunch of frequencies on the output of the XOR.
(a) The frequency content of the input multiplied by the fundamental of the "feedback" signal of the PLL. This is the signal that you want for making the PLL track the input.
(b) The frequency contents of the input signal multiplied by the harmonics of the "feedback" signal. This is unwanted and the loop filter on the PLL usually will remove it.
(c) The PWM frequency and its harmonics. This is another unwanted signal that gets eaten up by the loop filter.
(d) The PWM frequency and its harmonics intermixed with the harmonics of the "feedback" signal. Assuming that the feedback signal is 50-50 duty cycle and that the VCO is running at 2^N times the feedback, all of the energy in this also ends up at high frequencies. This also gets eaten by the loop filter.
I believe you described a synchronous voltage to time converter, sort of, i.e. a synchronous voltage to phase converter, ahead of the phase comparator. Seems a natural. Yes, sort of?
Loop1 and 2 form a wideband frequency locked loop and loop3 is a phase-locked-loop. When the signal comes into the lock range of the PLL the FLL can be disabled to avoid interaction. The circuit allows fast response.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here.
All logos and trade names are the property of their respective owners.