Balanced filter -> Balun vs. Balun -> Single-ended filter

I'm using one of those Analog Device DDS ICs that has a differential current-mode output. On the Analog Devices evaluation board schematics, they usually take the outputs through a fully differential LC filter for anti-aliasing and then through a balun to end up with a single-ended output. This of course takes a few more parts than immediately taking the output through a balun and then using a traditional single-ended filter. I've been debating the pros and cons of the two approaches and so far the reasons I can think of for going differential filter and then the balun are...

1) Somewhat more "ideal" filter in that a ground plane (or worse, ground trace) isn't being used for return currents, it's just current flowing from one side to the other of the differential output. (Seems minor, although from past filter designs I've done at UHF this might be a much larger improvement than I'm guesstimating here.) 2) Filtering out the high-frequency scunge before it hits the balun allows the balun to not handle quite as much energy and hence perform a little bit better (more linearly). (Also seems minor.)

Am I missing anything else here?

Thanks,

---Joel

Reply to
Joel Koltner
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What's the frequency range? We often go into a diff-input opamp first, then a single-ended filter. But then we usually go down to milliHertz frequencies.

But in your case, balun (or transformer) then filter seems more sensible.

Or if all you want is an RF sine wave, ground one of the outputs and filter the other. No balun!

Somebody should make a family of integrated differential-input, single-ended-output amps with integrated, ideally programmable, lowpass filters. They could sell heaps of them, for use with DDS chips and diff-out dacs. The damned filters are 10x the size of the chips!

John

Reply to
John Larkin

Hi John,

The output frequency range I care about is 275-300MHz (it's one of their 1GSps DDS chips), so I'm generally avoiding op-amps here. :-)

I am just after sine waves. Grounding one output seems reasonable enough, although Analaog Device's advice in this case is to use a doubly-terminated filter on one output (say, 100 ohms at each end) and then terminate the other output with the same effective load (100 ohms double terminated --> 50 ohms). (This is from

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, page 47.)

We'd definitely buy a bunch!

Thanks for the help,

---Joel

Reply to
Joel Koltner

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The AD9851 and its ilk (evaluation boards) go straight to a balun then to a single ended filter. The balanced filter is used to generate square waves. I had similar suspicions as to why they needed to provide balanced outputs and as I wanted DC upwards on the AD9851, I went balanced filter, then fast opamp. There's so little signal available anyway that I thought it worthwhile putting the time and effort in. Fat chance!, output was as lumpy as hell, so scrapped the idea and single ended off one leg. Much better!. Leg fell off though. I'd had enough and scrapped the project.

Damn, damn, those tiny packages. Half my project time now seems spent on engineering test PCBs just to allow test signals in and out of those sodding SM chips in an effort to confirm they do what they say on the tin. I don't want their evaluation boards or development kits or prototyping software or chip simulators or technical support. Just gimme a DIL style packaged version and let me get on with it.

Reply to
john jardine

Hi John,

So what were you planning to build out of the AD9851?

(I'm building a simple OOK-like frequency hopping transmitter.)

I'm thinking I'll drop Analog a note and see if they have anything to say about this. Unlike, say, Texas Instruments, they tend to actually respond to e-mail without having to remind them many times of getting a rep on the phone!

---Joel

Reply to
Joel Koltner

,

Gosh, what nonsense. A lot of ADI appnotes are nonsense.

We're having interesting problems with their ADUM1400 data coupler driving a floating AD5432 serial DAC. Both have bizarre powerup initilize problems.

John

Reply to
John Larkin

In this case, is it "this is just unnecessary and doesn't really help so it's a waste of parts"-nonsense or "this is actually harmful compared to the simpler approach"-nonsense? (Or possibly "ADI knows something they're not telling us..." -- buried in some application note somewhere for the ADF436x PLLs there's a note about (paraphrasing), "You really ought to have both outputs, V+/V-, terminated in the same load since, umm, if you just ground V- and use V+ in certain corner cases the PLL will fail to work..." -- Rather than try to figure out whether or not I had one of those corner cases, I added the second resistor. :-) )

---Joel

Reply to
Joel Koltner

What fun!

On the AD5432 serial DAC, it's supposed to power up using falling edge clocks, to clock in the SPI serial data+command word. But there's a command that changes it to rising edge! NOW it turns out that, once in a while, under unspecified conditions, it powers up assuming rising edge clocks! Looks like it does this a few tenths of a per cent of the time.

There are 16 possible commands. There are commands to set the output to zero and half-scale. It's not obvious why anybody would need either, since it's no more work to command it "load dac" and poke in any code you want. And there are a bunch of RESERVED opcodes which we are told, in impossibly fractured syntax, don't actually break the part. At least we hope that's what we're being told. The guys who designed it are in Limerick.

These people should all be kidnapped and sent to SPI re-education camps.

Grrrrr.

John

Reply to
John Larkin

With a $20 DDS chip? Couldn't you guys use one of the ChipCon ICs from TI plus a uC to do the hop instructions? Just don't count on much tech support there ...

What is it with TI these days? Where do they think the design-ins for the next years will come from? Or to say it more like Wall Street would, what will keep the stock price up?

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

Hi Joerg,

Yep. We're only building one or two prototypes at the moment, so the cost of parts is nothing compared to the cost of development time.

Not at the rather, uh, ...rapid... hop rates we're using. That 275-300MHz is just the beginning of the transmitter chain; much higher frequencies are involved by the time we're through.

---Joel

Reply to
Joel Koltner

Ok, then it's a different matter. I had interpreted the word "simple" as a plain old RF link at an ISM frequency. If the hop rates are faster than a few hundred usec the PLLs in the usual RF chips might not cut it.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

Just a heads up: At the MSP430 session they told us that TI (their ChipCon group) is going to come out with a spread-spectrum RF chip. Hasn't shown up on the site yet though.

--
Regards, Joerg

http://www.analogconsultants.com/
Reply to
Joerg

to

phone!

(Frequency hopping sounds a bit more than "simple" ;). AD9851 was for an auto coil Q meter (0-100MHz). Nobody seems to want to use Q meters anymore. Those that do, well know the tedium involved in establishing a Q value. Figured a micro could easily automate the process and offer the maths to extract secondary C-L-R values. After the DDS failure the project quickly morphed after noticing the AVR micro could offer good quality (quadrature) DDS upto 200kHz. Kit is now a controllable

0-20Vpp, +/- 0-20Vdc, 50 ohms source and 4 phased detectors running into a ADS1211 24bit A-D. Sort of a networky analyser thing that'll do gain/phase LCRQ etc. Puzzler at the mo' is where those 11 bits of LS noise on the ADC samples are coming from. Project driver was that NO, absolutely NO, SM devices would be allowed anywhere near it :)
Reply to
john jardine

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