Pinging 74HC4046 Users

alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.design,sci.electronics.misc

That exchange was you, me, you. You tested it and according to the email it went into an RFID Tag Chip that reports temperature and pressure of its environment via a 2.4GHz RF Link.

Deadband like a frequency where it doesn't work? Wouldn't there just be an upper limit that depends on the logic speed? I can't teach you anything about that. You'll have to teach me.

Here is the diagram with markings to show the sequence of transitions. The =0 and =1 indicate constant states. The "x" after a number means no further changes are caused by that transition. If you build it with NOR's it is negative-edge triggered.

below: Q(initially) = 0 RESET = 0

/0 SET -----+------------------------| | |NAND>--+ \1 +-------| \5 +--| | /6x |NAND>--+-----+ | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| /4 | | |NAND>-----+ | \3 +-------| +--| Q | |NAND>--+------- /2 +--------------------------------+--| | | | +----------|--+ | | +----------+ | | | _ +--------------------------------+--| | Q | |NAND>-----+---- \3 /2 +-------| +--| |NAND>--+ \3x | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =1 | | |NAND>-----+--+ | +-------| +--| | =0 | |NAND>--+ =1 RESET -----+------------------------|

below: Q(initially) = 0 RESET = 1

/0 SET -----+------------------------| | |NAND>--+ \1 +-------| \5 +--| | /6x |NAND>--+-----+ | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| /4 | | |NAND>-----+ | \3 +-------| +--| Q | |NAND>--+------- /2 +--------------------------------+--| | | | +----------|--+ | | +----------+ | | | _ +--------------------------------+--| | Q | |NAND>-----+---- \3 /2 +-------| +--| |NAND>--+ =1 | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =0 | | |NAND>-----+--+ | +-------| +--| | =1 | |NAND>--+ =1 RESET -----+------------------------|

below: Q(initially) = 1 RESET = 0

/0 SET -----+------------------------| | |NAND>--+ \1 +-------| \1 +--| | /2x |NAND>--+-----+ | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =1 | | |NAND>-----+ | =0 +-------| +--| Q | |NAND>--+------- =1 +--------------------------------+--| | | | +----------|--+ | | +----------+ | | | _ +--------------------------------+--| | Q | |NAND>-----+---- =0 =1 +-------| +--| |NAND>--+ =0 | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =1 | | |NAND>-----+--+ | +-------| +--| | =0 | |NAND>--+ =1 RESET -----+------------------------|

below: Q(initially) = 1 RESET = 1

/0 SET -----+------------------------| | |NAND>--+ \1 +-------| \1 +--| | /2x |NAND>--+-----+ | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =1 | | |NAND>-----+ | =0 +-------| +--| Q | |NAND>--+------- =1 +--------------------------------+--| | | | +----------|--+ | | +----------+ | | | _ +--------------------------------+--| | Q | |NAND>-----+---- =0 =1 +-------| +--| |NAND>--+ =1 | +--| | | | | | +----------|--+ | | | | +----------+ | | | | | +--| =0 | | |NAND>-----+--+ | +-------| +--| | =1 | |NAND>--+ =1 RESET -----+------------------------|

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Reply to
Tom Del Rosso
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much

ssle, and won't

Obviously. but what sort of idiot would use one that way? Of course, if your DDS has a 500MHz inrternal clock, 2nsec of jitter might be tolerable.

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When I mentioned DDS's earlier in this thread I did mention that you ought to filter the output, but I'd figured that people like you and Phil Hobbs wouldn't need to be reminded.

Actually, as long as the DAC refresh time is shorter than your low pass filter 3dB point, you should do appreciably better than the DAC resolution.

The "noise" on a pure staircase waveform is essentially a sawtooth wave at the DAC refresh rate, and that ought to be a lot faster than the frequency you are interested in, and correspondingly easy to filter out. Four or six poles of low pass filter isn't going to cost anything like as much as the DDS chip.

You should have paid closer attention during the relevant lectures

Only if you find low-pass filters intimidating

VCXO do - however - tend to be rather restricted in the frequencies they can generate.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

ch

ssle, and won't

r

That's Jamie for you. John Larkin makes a fool of himself and Jamie chimes in to tell us that he too is intellectually limited - as if we didn't already know.

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Bill Sloman, Sydney
Reply to
Bill Sloman

hassle, and won't

Someone who wants to do a lot of DDS PLLs in an FPGA, without going off chip to DACS and filters and comparators.

Of course,

We don't use standard DDS chips very often. We do our own DDS logic in an FPGA, and sometimes use the MSB on-chip, sometimes go to a fast DAC off-chip.

But reminded? By you? I design electronics, and you don't.

The filter takes a lot more area, and does often cost more.

At low frequencies, the filter output settles between phase accumulator code transitions, so the waveform has plateaus. The plateaus trip the comparator at fuzzy levels, so you get a lot of jitter. As I said, period jitter of about 1/20000 RMS is typical for a

16 bit system. One trick is to keep the DDS frequency high, so the filter stays in its sweet spot, and divide down after the comparator.

I don't understand why ADI makes so many DDS chips, but doesn't make an integrated lowpass filter.

What an ass you are. I got my EE degree before DDS was invented, and you are even older than I am.

How many DDS synthesizers have you designed in the last 10 years? I've done a dozen or so. Hell, have you ever designed a DDS into something?

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--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

ty much

hassle, and won't

I'm not designing much electronics a the moment, but I didn't need to be reminded that you ought to filter the output of a DDS chip.

If you've built the logic part of the DDS chip into a corner of an FPGA this could well be true. No DAc and no filter sounds like taking economy a little too far.

Only if your low pass filter cuts off at too high a frequency. This does depend on the frequency range you want to cover, and if you were going nuts you might look at ways of moving the 3dB point of the low pass filter around to cover a really wide frequency range.

It's not the plateau that trips the comparator, but the noise on the plateau. A little hysteresis around the comparator might help, but I shouldn't have to point this out to someone with your extravagantly practiced expertise.

The DDS chips would be built with a logic process, while the filter could be expected to be analog. A delay line that could be used to set up a FIR filter could be interesting, but it would use up a lot of pins.

I never got an EE degree, and learned the stuff when I needed it - and read up on it from time to time when I needed more. Low pass filters aren't either complicated or difficult. Why you feel the need to describe them as "damned" escapes me.

None. I've been out of work aka retired for the last ten years, as you well know

g?

Nothing that got built. I still managed to get my head around the idea that you ought to filter what comes out of the DAC, which doesn't seem to have lodged all that firmly with you.

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Bill Sloman, Sydney
Reply to
Bill Sloman

and won't

Actually, it's quite the opposite. Good show.

Jamie

Reply to
Jamie

and won't

I can say one thing about slugman, it does not usually impersonate that often, he's doing very well at being himself, the ASS.

Jamie

Reply to
Jamie

much

hassle, and won't

.

at

Jamie may be slow, but he's persistent. Pity about the direction.

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Bill Sloman, Sydney
Reply to
Bill Sloman

much

hassle, and won't

"Ought to" means that you are following hearsay. We use filters when it makes sense.

It's bad enough that you make statements that are uninformed or wrong, but you have to phrase them as personal insults.

Your story about applying for work at ASML summarizes the situation: your are way to obnoxious for your own good.

Please design a suitable tunable, adaptive filter and post it here. Cutoff from, say, 45 KHz to 45 MHz, glitch-free tuning. 7 poles would be adequate.

Or its residual slope.

A little hysteresis around the comparator might help, but I

Idiot. Hysteresis won't help the jitter at all.

What does help a bit is digital interpolation, between lookup table entries, at the full clock rate. We do that in several of our products. It is especually useful in products that have multiple DDSs on chip and allow cross-synthesizer moddulations, like our V346. Any DDS can AM/FM/PM any other, in compound paths. All the modulations are on-chip, and only the final outputs have DACs and filters.

Their full company name is Analog Devices.

A delay line that could be used to set

It escapes you because you don't actually design DDSs or their filters.

That seems to be your history, designing stuff that doesn't get built.

Get an ADI DDS eval board and learn something.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

much

hassle, and won't

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Reply to
Michael A. Terrell

pretty much

hassle, and won't

something?

Seven dollars! It looks like it includes a 7-pole elliptic LC filter, too.

One can usually get an eval board for free, from an ADI rep. But you'd have to sound competant and friendly, which would both be difficult for Sloman.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

hassle, and won't

There is no amount of bull shit you can spread here that would change my view of you using this place as a dumping ground.

Polluting is illegal in most places around the world.

Jamie

Reply to
Jamie

pretty much

needless hassle, and won't

something?

Now, all he has to do is collect enough empty beer cans to pay for it.

Reply to
Michael A. Terrell

retty much

ess hassle, and won't

a

...

nd

"Hearsay" is this context, is body of electronic knowledge that motivated the development of the DDS approach. An accumulator generates a sequence of digital phase values for the sine wave being synthesised, a look-up table turns this into a sequency of digital amplitudes, and a DAC turns this into a sequence of analog voltages (or currents), which ias a staircase approximation to the desired waveform. The Fourier transform of this waveform includes the desired fundamental and the undesired high frequency artifacts representing the steps in the staircase, which you can filter out to any desired degree with a suitable low pass filter.

All hearsay, until you build the hardware, but peculiarly reliable hearsay.

You do find personal insults where most people would merely find colourful language.

I upset the personal department by going behind their backs to talk to an engineer that I'd been interviewed by earlier. Personnel departments aren't good at evaluating engineers. Good ones know it and don't get too upset about being by-passed. Bad ones know it too but hate being reminded that they aren't as clever as they like to think. At ASML it looks as if the guy in charge was more interested in defending his right to act as a gatekeeper than in getting the right people through the gate.

e

What - precisely - is the application? The obvious solution would be clock-tuned FIR filter, where the filter shaped was determined by a bunch of resistors (or mabybe capacitors - I've not designed a capacitor based version, but I've a vague idea that it might be practical).

That sort of requirement usually means that somebody has screwed up their system design, and you'd be better off thinking out the system again.

Some devices do have a specified minimum slew rate for reliable operation; essentially this reflect the spectral distribution of the internal nosie sources (generally PSRR in practice).

If the comparator flips repeatedly as the waveform goes through 0V (or whatever threshold you've chosen) you'll have a nasty output. Hysterisis will prevent that, and the high frequency noise that the comparator will inject into the system as it flips repeatedly

If the internal noise around the comparator means that it flips once, but at an uncertain time determined by the amplitude of the noise divided by the slope or the ramp, you will have jitter, but that's just the second law of thermodynamics.

Digitally interpolating what, where? I presume you are using multiple DDS's to synthesise a modulated sine wave - which is to say that you are multipling the amplitudes in the digital domain

The term "process" refers to the sequence of operations used to convert a the surface of a silicon wafer into a integrated circuit. Some processes are optimised to produce digital logic, others to produce analog devices, and some can be used to produce mixed signal devices.

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Back when I was working on the Cambridge Instruments Electron Beam Testers for looking at the surfaces of bare chips while they were working, the customers would talk to us about that kind of stuff, but only in broad terms.

I've designed quite enough filters to appreciate where it gets interesting.

hing?

It's not the whole of my history by any means. The electron beam tester got built, and worked, but never went into production. Quite a bit of the less ambitious stuff did go all the way. You seem to concentrate on doing lots of little, less ambitious designs, and have more stuff that makes it into production.

If I had a potential customer for the knowledge that I might acquire, I'd do it like a shot. At the moment I'm more interested in looking at the Sydney job ads - I found two that I could reasonably respond to on Friday, and sent my CV off to the relevant agencies. I expect to get brushed off - after the Netherlands my expectations aren't high - but it does get my name into the database.

Settling in in Sydney is distinctly time consuming. We wandered around the Sydney Motor Show last night and my wife bought a car, which means more bureaucratic procedures to be dealt with.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

They seemed friendly enough at the last Analog Devices seminar I attended - which looks as if it was in Eindhoven in September last year. I had more clout when I worked for Cambridge Instruments, and we once got a site visit from Barry Gilbert - I'd hoped to be able to sell him on the electron beam tester, but the RF parts he was pushing were a bit quick for the hardware we'd put together then. I'd had some ideas about coping with faster integrated circuits, but the priority at that time was on perfecting what we had.

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Bill Sloman, Nijmegen
Reply to
Bill Sloman

Mike Terrell's can't imagine that I've got more money than he has. If I need that kind of stuff I buy it from Farnell. Finding some place to store it is more of a constraint.

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Bill Sloman, Sydney
Reply to
Bill Sloman

y much

s hassle, and won't

...

nd

that

Jamie can't tell shit from shinola., and has no inhibitions about advertising his inadequecies. Sad.

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Bill Sloman, Sydney
Reply to
Bill Sloman

pretty much

hassle, and won't

Sounds to me that he did his job very well.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

It could be that Highland Technology Inc. has the same kind of problem.

--
Bill Sloman, Sydney
Reply to
Bill Sloman

Not hiring you is not a "problem", it's a joy.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

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