PICAXE 08-M (12F683) Input buffering for ESD protection

Dec 10, 2008 5 Replies

I am designing a small telemetry board for a high altitude rocket launch. I am using a 08-M and want to protect 3 input ports from ESD, because the telemetry is also part of the recovery beacon, current consumption is a concern as I would like to have battery life extend to days or weeks on a CR123 battery. For my prototype I am using a TVS suppressor of discrete components electrically similar to a COMCHIP CSR series: (see link) Which consist of two clamping diodes (per line) and a zener which clamp the ESD event to about 5 or 6 volts. Also 2 capacitors C1 and C2 to shunt high frequency ESD that the diodes may be too slow to respond to.



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The telemetry I/O ports will be wired to switches monitoring such items as chute deployement upon which the circuit will become an open circuit when the chute(s)deploy making the I/O port susceptible to ESD events from the chute or static charge of the fiberglass rocket body. The lead length will be 2 or 3 feet.



It is unclear how best to apply the TVS suppressor in circuit, my thought is that it should be wired directly to the 08-M 1/0 port with with the 10K pull up resistor and a 1K current limiting resistor wired between the external screw terminal for the external switch and the TVS device. (that way simultaneously limiting external current to the TVS and the 08-M).



(I hope this "drawing works!)



*--------------*--------*----------------(+3.1V) | | | | | _|_ _|_/ | | /|\\ //|\\ (08-M I/O port) | _|_ | /|\\ ___ | ___ < C1 GND | (GND)


Does this appear to be a viable design? Can anyone recommend value for C1 and C2? This is a low speed application (mechanical switch sense).



Is there another solution such as a transistor buffer (preferably non inverting) array in chip form that is not ESD sensitive?



Again my constraints in order are:


1) reliability
2) current consumption (a buffer will result in more current draw than passive TVS?)
3)Form factor (chip array instead of discrete components)
4)weight
Joe Leikhim K4SAT "The RFI-EMI-GUY"© "Treason doth never prosper: what\'s the reason? For if it prosper, none dare call it treason." "Follow The Money" ;-P

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Joe Leikhim K4SAT "The RFI-EMI-GUY"© "Treason doth never prosper: what\'s the reason? For if it prosper, none dare call it treason." "Follow The Money" ;-P

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------------------------ 3V | 10k | o--------[1k]--------| I/O Port | | TVS ----- 10n | ----- | | o------------------ GROUNDPLANE

I have used this simpler structure for protection against quite large ESD events. The idea is that the TVS limits the ESD event voltage right at the PCB connector, before it has a chance to affect anything else. Then the series resistance and capacitance get rid of any remainder. (And you get some level of debouncing for free). However unlike yours there is no protection against a *sustained* over-voltage

- the TVS will fail, probably short-circuit.

[...]
John Devereux

seems overkill, the chip should already have internal protection diodes.

| chip (input)----[100k]---[ |

as you're only monitoring slow inputs like switches: improved version.

| chip (input)--[1M]--+--[1M]-----[ | | === .1uF | --+--

He may well get away with that - but I think you could find that an ESD spark jumps right over the 100k. Or the effective parallel capacitance of it could allow enough current to zap the chip.

He seems to want a pullup for the input, and 1M is a bit high for an outdoor environment - perhaps:

| 22k | (input)>---1k----1k----- Chip | === 1u | ----

John Devereux

On a sunny day (Tue, 09 Dec 2008 20:15:41 -0500) it happened RFI-EMI-GUY wrote in :

whatever 470 supply 5V

---- R1 -------- R2 ----- PIC in. | zener | 5.1V ///

For a lower voltage PIC supply use a lower voltage zener. R2 limits the current during search via the PIC input protection diodes. Circuit sort of works for me (zero failures in 10 years) with some other chips.

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