opamp input capacitance

Guess: 0.75?

Unfortunately it often seems to be the common mode capacitance that one cares about.

George H.

Take a look at fig 50 in the datasheet.

tm

Well, duh! It's not in the test circuit figures where I expected it.

Next question: is Ccm = 2 * Cm?

So an inverting amp, with IN+ grounded, will see 0.75 pF at IN- ???

I think your guess is correct. CCM is mostly due to the package pin to ground. That differential number is flaky, given that the inputs are adjacent.

...Jim Thompson

They call Cm the "common mode capacitance of the amplifier" (between equations 14 and 15) so I would guess 1.4pF, as George's not-unduly-pessimistic reading of the ds.

Different makers do it differently, unfortunately. And it's never done under power, AFAICT.

Cheers

Phil Hobbs

If Ccm is the sum of both pin capacitances to ground, and Cdiff is the

I *want* it to be 0.75.

I was moving wood after work today, (and thinking), it's not the most 'pessimistic number'. I'm not sure how they measure the CM Cap. but they could tie the inputs together, measure that, and then divide by 2. In which case most of the CM cap could be in one input or the other.

So my pessimistic number would be 2.5, (someone may have measured it.)

George H.

I would think the Cm is one pin to ground and the Cdif is one input to the other.

So 0.75 pF would be my guess.

Who has one and a Boonton C meter?

George keeps getting more pessimistic!

I do. I'd better measure it, I guess. Grumble.

I know you do, but sadly the data sheet sez different, the way I read it, and as you know well the worst way to read it is (at best) the right way.

Ccm is the capacitance from one input to ground, and the total capacitance from both inputs to ground is twice that.

See, for example:-

Best regards, Spehro Pefhany

Great, I hope it is 0.75pF! If it's >2pF then you have to buy me a beer if I'm every in SF. (I get buy yours at the same time.) George H.

Someone always has to spoil the fun.

Generally pin capacitance isn't measured on automatic test equipment. There is too much capacitance just in the handlers, relays, cables, etc. You can try to null that capacitance, but really nobody (based on places I worked) bothers to measure it at test at all.

Pin capacitance is a GBD (guaranteed by design) spec. Here is the reasoning behind this. The first step once wafers leave the fab is to test them parametrically. You insure the basic components meet specifications. There will be test structures in the test pattern than will have enough capacitance to make it easier to measure component capacitance. Once you believe the wafer is within specifications, the pin capacitance should also be within specifications.

Now the final product (packaged chip) is bench tested, and that will include testing pin capacitance. It will be done powered. This has to be the case since protection diodes need to be reversed biased. Since the parameter is not measured at final test, it tends to be very much guardbanded. Much like leakage specifications, the actual product will be much better than the specification.

Equation 15 of the DS says Spehro is correct.

Bud Light?

I ran a sim, based on the analog.lib file that you sent. A follower has an input c of 1.4 pF.

Le Mon, 16 Sep 2013 20:23:57 -0400, Spehro Pefhany a écrit:

Yup. Analog Dev can't be wrong :-), so just have a look at their spice model. The first 4 lines say it all: Cmm=1.3pF, Cd=0.1pF