Unequivalent Input Impedance in Differential OpAmp Circuit

The usual problem in imbalancing input impedance is (in bipolar op amps) a coupling of temperature-of-chip to the offset voltage; in one memorable instance, I had to add series resistance in order to get an offset trim to stop drifting.

A secondary problem is transient response, because of input capacitance loading.

In either case, a series input resistance (directly into the high-impedance input) can restore balance, at least at low frequencies.

tial inputs...

ltage gain of 1 rather than 1/5. This will give an imbalance in input impe dance of 2:1.

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ce input) can restore

Thanks for the info. I'm not sure I understand the series resistance you a re talking about. I think this is already provided for in this design.

The differential input op amp circuit has equivalent voltage divider circui ts on both the inverting and non-inverting inputs. The difference is the n on-inverting input divider is referenced to ground and the inverting input divider is referenced to the output. But dividers use the same value resis tances Ra and Rb. I believe this presents equal impedances to the op amp i nputs so bias currents result in equal offsets other than the input offset current.

The impedance I am referring to is the impedance seen by the circuit drivin g the op amp circuit. In this case the driving circuit is the AC coupling cap. As best I can tell the input coupling cap on the non-inverting input see the sum of Ra and Rb as the input resistance. The input coupling cap o n the inverting input sees just the input resistor Rb as the input resistan ce. When Rb is much larger than Ra (reduction of voltage between input and output of this stage) the two input resistances are roughly equal.

When the gain of the op amp circuit is close to unity or larger Ra is large r than Rb and the two inputs have very different input resistances. I supp ose this could be compensated for by using equal ratios, but unequal values in the two halves of the circuit. Unfortunately I don't think this can be used in this design because the customer wants to add external series resi stors to change the gain setting.

There is a later low pass filter in the circuit to provide anti-aliasing. Until now I've allowed the input coupling cap operate as a second pole for this anti-aliasing filter. I may have to settle for a single pole.

Actually, this has given me an idea. The audio circuits are 600 ohm impeda nce, so rather than add a resistor to the input to couple into the op amp g ain computation, there is enough drive to use a 5:1 divider with a 600 ohm input impedance which will have about a 100 ohm output impedance. Then the divider can be added or not without impacting the operation of the op amp and the input coupling caps.

Thanks for stimulating some new thoughts.

I mocked up a simulation and I don't get the result I expected. The op amp uses four 20 kohm resistors so the two dividers are 1:1. I expected this to give 40 kohm input impedance for the non-inverting input impedance and 2

I also tried this with 40 kohm resistors in the inverting divider. I expec ted the two input impedances to then be equal resulting in matched frequenc y responses, but they were not matched.

Can anyone explain what I am thinking wrong about the circuit? I am attach ing the LTspice code below.

I'm not unhappy. I just can't find a web page that adequately analyzes thi s so I can understand what is happening. When I look at this as two separa te single ended inputs I expect the impedance to be twice as high on the no n-inverting input. When I look at it as differential inputs with a differe ntial signal the non-inverting input seems to have three times the impedanc e as the inverting input. When I look at the common mode signal the two in puts seem to have the same impedance.

I don't get it...

Version 4 SHEET 1 2208 716 WIRE 272 -672 96 -672 WIRE 560 -672 352 -672 WIRE 736 -672 640 -672 WIRE 848 -672 736 -672 WIRE 976 -672 848 -672 WIRE 1072 -672 1040 -672 WIRE 1136 -672 1072 -672 WIRE 1264 -672 1216 -672 WIRE 1312 -672 1264 -672 WIRE 1440 -672 1392 -672 WIRE 1456 -672 1440 -672 WIRE 736 -656 736 -672 WIRE 848 -656 848 -672 WIRE 1392 -608 1360 -608 WIRE 848 -576 848 -592 WIRE 1392 -576 1392 -608 WIRE 736 -560 736 -576 WIRE 1264 -560 1264 -672 WIRE 1360 -560 1264 -560 WIRE 1456 -544 1456 -672 WIRE 1456 -544 1424 -544 WIRE 1488 -544 1456 -544 WIRE 1616 -544 1568 -544 WIRE 1632 -544 1616 -544 WIRE 1664 -544 1632 -544 WIRE 1808 -544 1728 -544 WIRE 1360 -528 1264 -528 WIRE 1616 -512 1616 -544 WIRE 1808 -512 1808 -544 WIRE 1392 -480 1392 -512 WIRE 272 -416 192 -416 WIRE 560 -416 352 -416 WIRE 736 -416 640 -416 WIRE 848 -416 736 -416 WIRE 976 -416 848 -416 WIRE 1072 -416 1040 -416 WIRE 1136 -416 1072 -416 WIRE 1264 -416 1264 -528 WIRE 1264 -416 1216 -416 WIRE 1312 -416 1264 -416 WIRE 1440 -416 1392 -416 WIRE 1472 -416 1440 -416 WIRE 1616 -416 1616 -448 WIRE 736 -400 736 -416 WIRE 848 -400 848 -416 WIRE 1808 -400 1808 -432 WIRE 192 -384 192 -416 WIRE 848 -320 848 -336 WIRE 736 -304 736 -320 WIRE 192 -256 192 -304 WIRE 544 -256 192 -256 WIRE 192 -208 192 -256 WIRE 544 -208 544 -256 WIRE 976 -176 976 -224 WIRE 1024 -176 976 -176 WIRE 1152 -176 1104 -176 WIRE 1184 -176 1152 -176 WIRE 1184 -144 1184 -176 WIRE 976 -128 976 -176 WIRE 96 -80 96 -672 WIRE 192 -80 192 -128 WIRE 192 -80 96 -80 WIRE 544 -80 544 -128 WIRE 976 -16 976 -48 WIRE 1184 -16 1184 -80 FLAG 1808 -544 Lin FLAG 1808 -400 0 FLAG 1360 -608 Vplus FLAG 1392 -480 0 FLAG 1616 -416 0 FLAG 1440 -416 LCOM FLAG 1072 -672 INA FLAG 1072 -416 INB FLAG 1440 -672 LISNG FLAG 1632 -544 LINOD FLAG 848 -576 0 FLAG 848 -320 0 FLAG 192 -416 Lout FLAG 736 -560 0 FLAG 736 -304 0 FLAG 544 -80 0 FLAG 976 -224 Vplus FLAG 976 -16 0 FLAG 1184 -16 0 FLAG 1152 -176 LCOM SYMBOL res 1824 -528 M0 SYMATTR InstName U5.2 SYMATTR Value 6k SYMBOL cap 1728 -528 M270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C72

SYMBOL cap 1632 -512 M0 SYMATTR InstName C74

SYMBOL res 1472 -560 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R40 SYMATTR Value 47 SYMBOL Opamps\\UniversalOpamp2 1392 -544 R0 SYMATTR InstName U6A SYMATTR SpiceLine ilimit=25m rail=1 Vos=0 phimargin=45 SYMBOL res 1296 -688 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R39 SYMATTR Value 20k SYMBOL res 1120 -688 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R41 SYMATTR Value 20k SYMBOL res 1120 -432 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R43 SYMATTR Value 20k SYMBOL res 1408 -432 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R42 SYMATTR Value 20k SYMBOL cap 976 -688 M90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C101

SYMBOL cap 976 -432 M90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C100

SYMBOL res 544 -688 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R24 SYMATTR Value {input_res} SYMBOL res 544 -432 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R25 SYMATTR Value {input_res} SYMBOL cap 864 -656 M0 SYMATTR InstName C10 SYMATTR Value 100pF SYMBOL cap 864 -400 M0 SYMATTR InstName C11 SYMATTR Value 100pF SYMBOL res 368 -432 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R26 SYMATTR Value 300 SYMBOL res 752 -672 M0 SYMATTR InstName R18 SYMATTR Value {div_res} SYMBOL res 752 -416 M0 SYMATTR InstName R19 SYMATTR Value {div_res} SYMBOL voltage 192 -400 M0 WINDOW 0 -67 19 Left 2 WINDOW 3 -296 103 Left 2 WINDOW 123 -67 47 Left 2 WINDOW 39 0 0 Left 0 SYMATTR InstName V5 SYMATTR Value SINE(0 02.5 1000 0 0 0 10) SYMATTR Value2 AC 1 SYMBOL res 368 -688 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R27 SYMATTR Value 300 SYMBOL voltage 544 -224 M0 WINDOW 0 34 23 Left 2 WINDOW 3 10 -9 Left 2 WINDOW 123 -117 69 Left 2 WINDOW 39 0 0 Left 0 SYMATTR InstName V7 SYMATTR Value SINE(0 0.05 60 0 0 0 10) SYMBOL voltage 192 -224 M0 WINDOW 0 -67 19 Left 2 WINDOW 3 -291 106 Left 2 WINDOW 123 -67 47 Left 2 WINDOW 39 0 0 Left 0 SYMATTR InstName V6 SYMATTR Value SINE(0 0.25 1000 0 0 0 10) SYMBOL voltage 976 -144 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 12 SYMBOL zener 1168 -80 M180 WINDOW 0 24 64 Left 2 WINDOW 3 24 0 Left 2 SYMATTR InstName D1 SYMATTR Value BZX84C6V2L SYMATTR Description Diode SYMATTR Type diode SYMBOL res 1120 -192 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 4.7k TEXT 1384 0 Left 2 !.meas TRAN in PP v(Lout) TEXT 1384 40 Left 2 !.meas TRAN out PP v(out) TEXT 1384 -40 Left 2 !.meas TRAN gain PARAM out/in TEXT 1384 -80 Left 2 !.meas TRAN OutA PP v(OutA) TEXT 1384 -160 Left 2 !.meas TRAN final_gain PARAM OutB/in TEXT 1384 -120 Left 2 !.meas TRAN OutB PP v(OutB) TEXT 1384 -200 Left 2 !.meas TRAN final_gain_600 PARAM OutA/in TEXT 1384 80 Left 2 !;.tran 200ms\n.ac dec 100 2 6meg TEXT 1384 -240 Left 2 !.PARAM input_res=0.1 TEXT 1384 -280 Left 2 !.PARAM feedbk_res=20k TEXT 1384 -320 Left 2 !.PARAM div_res=1meg TEXT 688 -744 Left 3 ;Cable TEXT 264 -744 Left 3 ;Source TEXT 1808 -632 Center 2 ;CODEC\ninput TEXT 1416 -744 Left 3 ;Input Amp

(snip LTSpice code)

At what point in your circuit do you want input impedance? Perhaps at INA and INB?

See my earlier post, please. And at what frequency? Do you want the impedance as R,theta or R+jX?

amp uses four 20 kohm resistors so the two dividers are 1:1. I expected t his to give 40 kohm input impedance for the non-inverting input impedance a nd 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response on the resulting filters of the two inputs. I didn't. The attenuation at 20 Hz was very even between the two inputs.

xpected the two input impedances to then be equal resulting in matched freq uency responses, but they were not matched.

taching the LTspice code below.

this so I can understand what is happening. When I look at this as two se parate single ended inputs I expect the impedance to be twice as high on th e non-inverting input. When I look at it as differential inputs with a dif ferential signal the non-inverting input seems to have three times the impe dance as the inverting input. When I look at the common mode signal the tw o inputs seem to have the same impedance.

Actually, the point crossed by the dotted line between Cable and Input Amp. The decoupling caps are on my board.

The circuitry in the Cable section can be ignored or cut out other than R18 which should be 600 ohms I expect. This will be supplied by the customer once we decide how best to do the two variations.

My main concern now is that the decoupling caps C100 and C101 have an equal impact on the frequency response of the circuit. While these do not need to be what sets the frequency response at the low end, unless I want to up their value significantly they will be what sets the low end frequency resp onse in the input circuit. I'm also concerned about upsetting the common m ode rejection due to an imbalance for low frequencies like power line noise .

amp uses four 20 kohm resistors so the two dividers are 1:1. I expected t his to give 40 kohm input impedance for the non-inverting input impedance a nd 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response on the resulting filters of the two inputs. I didn't. The attenuation at 20 Hz was very even between the two inputs.

xpected the two input impedances to then be equal resulting in matched freq uency responses, but they were not matched.

taching the LTspice code below.

this so I can understand what is happening. When I look at this as two se parate single ended inputs I expect the impedance to be twice as high on th e non-inverting input. When I look at it as differential inputs with a dif ferential signal the non-inverting input seems to have three times the impe dance as the inverting input. When I look at the common mode signal the tw o inputs seem to have the same impedance.

Sorry, I guess I'm looking for more of an explanation that will let me unde rstand what makes it balanced. The simulations seems to show it works when I expect it to not work. I'm willing to bet the real circuit works ok too .

In the LTspice group someone indicated the impedances are indeed not equal, but the unequal gains of the two inputs result in the filter having the sa me result on each leg. I can't say I understand that mostly because with t he ratio of resistors being equal in the inverting and non-inverting legs, the resulting gains of the two inputs are equal. So I'm just not clear on what is going on with the impedance.

op amp uses four 20 kohm resistors so the two dividers are 1:1. I expected this to give 40 kohm input impedance for the non-inverting input impedance and 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response on t he resulting filters of the two inputs. I didn't. The attenuation at 20 H z was very even between the two inputs.

expected the two input impedances to then be equal resulting in matched fr equency responses, but they were not matched.

attaching the LTspice code below.

es this so I can understand what is happening. When I look at this as two separate single ended inputs I expect the impedance to be twice as high on the non-inverting input. When I look at it as differential inputs with a d ifferential signal the non-inverting input seems to have three times the im pedance as the inverting input. When I look at the common mode signal the two inputs seem to have the same impedance.

p. The decoupling caps are on my board.

al impact on the frequency response of the circuit. While these do not nee d to be what sets the frequency response at the low end, unless I want to u p their value significantly they will be what sets the low end frequency re sponse in the input circuit. I'm also concerned about upsetting the common mode rejection due to an imbalance for low frequencies like power line noi se.

Let me change what I wrote. I'm looking to analyze the input impedance at points INA and INB without the caps in the circuit. That will allow me to understand the impact of adding the capacitors C100 and C101.

Just looking without any Cs, four equal resistors, dual supplies...

Consider the case where the circuit's +ve input is at 2V. That means the non-inverting op-amp terminal is at 1V.

Now put 1V on the circuit's -ve input. No current will flow though the input R because there's no voltage across it, so the -ve input impedance V/I is infinite. Try with some other voltages.

The -ve input impedance varies with signal level. The -ve input impedance equals the +ve input impedance (2R) only when both inputs are at the same voltage. If the inputs are equal voltage but opposite polarity, I think the -ve input impedance is 1/3 the +ve, or 2R/3. -- Cheers Clive

The circuit has different impedances for differential and common-mode signals.

CM: The output stays still, and so does ground, so the input impedances are both Rin+Rf.

Differential: The output moves the same amount as the differential signal, and both inputs move half that amount.

Going pos -> pos + 1, neg -> neg -1 (2V differential) makes the noninv input increase by 0.5V, so its differential input impedance is 2*Rin. Feedback forces the inverting input to follow, so the voltage across its input resistor increases by 1.5V, so its differential resistance is 2/3

• Rin.

Moving just one input is half differential mode and half common mode, so you have to figure the contributions separately. In other words, the neg input current depends on both voltages.

Cheers

Phil Hobbs

ual, but the unequal gains of the two inputs result in the filter having th e same result on each leg. I can't say I understand that mostly because wi th the ratio of resistors being equal in the inverting and non-inverting le gs, the resulting gains of the two inputs are equal. So I'm just not clear on what is going on with the impedance.

Let me talk about the difference between DC voltages and AC voltages. I ca re about the input impedance because of how it will interact with the imped ance of the input capacitors. At DC the input capacitors have infinite imp edance and the amp circuit will self bias to the reference voltage applied to the termination on the non-inverting input (LCOM which we can think of a s ground). That's the DC analysis.

Now apply a 1 Vpp signal to the non-inverting input. The impedance seen wi ll be the series resistance of R42 and R43. Now instead, apply a 1 Vpp sig nal to the inverting input. The inverting op amp input will not move due t o the operation of the negative feedback resulting in the input impedance b eing R41 alone. When I simulate this with an AC analysis on one input at a time I get the same results. Or maybe not. I have three voltage sources wired in and apply AC 1 to one at a time. Do the other two voltage sources act as shorts for AC analysis?

Apply opposite polarity 1 Vpp signals (differential) to the two circuit inp uts. The op amp non-inverting input will see 0.5 Vpp and again the impedan ce is R42 + R43. The output will be 2 Vpp with an opposite polarity of the inverting input, so the current in R39 and R41 will be 3 times that of the current through R42 and R43 resulting in 3 times lower input impedance. S imulating this by applying AC 1 to the + and - inputs at the same time give s a 6 dB higher signal out, but the same filter response.

Apply same polarity 1 Vpp signals to both inputs (common mode). The op amp non-inverting input is 0.5 Vpp as is the op amp inverting input. The outp ut is 0 volts and both inputs have the same current so the same impedance. In this case the impedance "seen" by the input caps will be the same in bo th legs, so the filters will have the same characteristics and the common m ode rejection will be preserved. The simulation shows -56 dB attenuation t hrough the pass band with roll off in the higher and lower frequencies... a s I would expect. But I wonder why -56 dB? Why not -66 dB or -106 dB? Pe rhaps this is an artifact of the Zener diode reference having a non-zero im pedance?

I just wish I could analyze the differential mode input impedances to be th e same. I suppose the combined effects of the two sides of the signal path result in the same result on the two sides somehow.

I hate stumbling around like this.

Very well. Using you circuit but disconnecting the capacitors and inserting an AC source (0 ohm source impedance) to supply the inputs in parallel shows that the resistance of the two inputs at R41 and R42 are equal and ~40k. These are each with respect to ground.

Remember that source impedance and differential operation will make things much different from this. If you want my analysis of other parts of your circuit and under other conditions, please let me know.

amp uses four 20 kohm resistors so the two dividers are 1:1. I expected t his to give 40 kohm input impedance for the non-inverting input impedance a nd 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response on the resulting filters of the two inputs. I didn't. The attenuation at 20 Hz was very even between the two inputs.

xpected the two input impedances to then be equal resulting in matched freq uency responses, but they were not matched.

taching the LTspice code below.

this so I can understand what is happening. When I look at this as two se parate single ended inputs I expect the impedance to be twice as high on th e non-inverting input. When I look at it as differential inputs with a dif ferential signal the non-inverting input seems to have three times the impe dance as the inverting input. When I look at the common mode signal the tw o inputs seem to have the same impedance.

It would seem these distinct input impedances in differential mode would re sult in different corner frequencies with the input coupling caps. I can't seem to m measure that, but then perhaps my circuit doesn't work the way I expect in AC mode. Wiring the two voltage sources between the input and g round clearly isolates them and driving one at a time still gives exactly t he same corner frequency. It seems to be around Req of 36 kohms. 4.54 Hz measured vs 4 Hz with the more expected 40 kohms.

op amp uses four 20 kohm resistors so the two dividers are 1:1. I expecte d this to give 40 kohm input impedance for the non-inverting input impedanc e and 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response on the resulting filters of the two inputs. I didn't. The attenuation at 20 Hz was very even between the two inputs.

I expected the two input impedances to then be equal resulting in matched f requency responses, but they were not matched.

attaching the LTspice code below.

zes this so I can understand what is happening. When I look at this as two separate single ended inputs I expect the impedance to be twice as high on the non-inverting input. When I look at it as differential inputs with a differential signal the non-inverting input seems to have three times the i mpedance as the inverting input. When I look at the common mode signal the two inputs seem to have the same impedance.

Amp. The decoupling caps are on my board.

n R18 which should be 600 ohms I expect. This will be supplied by the cust omer once we decide how best to do the two variations.

equal impact on the frequency response of the circuit. While these do not need to be what sets the frequency response at the low end, unless I want t o up their value significantly they will be what sets the low end frequency response in the input circuit. I'm also concerned about upsetting the com mon mode rejection due to an imbalance for low frequencies like power line noise.

at points INA and INB without the caps in the circuit. That will allow me to understand the impact of adding the capacitors C100 and C101.

I'm looking for understanding. The simulation tells me what it is, so I kn ow that. But I don't understand why the inverting input has the same input impedance as the non-inverting input. How did you come to your conclusion ?

The source impedance is low compared to these values. It is nominally a 60

Thanks for your comments.

LTSpice came to that conclusion under the conditions I listed above. Caps disconnected. Left ends of R41 and R43 tied together and connected to a 1V AC source with 0 ohm internal impedance. I measured the current through each resistor and divided the source voltage by each current. If you make the vertical axis linearly scaled, it will read directly in ohms.

Under these conditions both opamp inputs will be equal. Therefore the OA output is zero. If the OA output is zero, that means that each input is the same impedance and equal to 40k.

This is immediately apparent by inspection and no spice simulation is needed.

I set my source impedance to 600 ohms. The input impedance remained the same. Where do you want to put the 600 ohm termination?

My pleasure. I just hope I understand your quest.

he op amp uses four 20 kohm resistors so the two dividers are 1:1. I expec ted this to give 40 kohm input impedance for the non-inverting input impeda nce and 20 kohm input impedance for the inverting input. Combine that with 1 uF input coupling caps and I expected to see uneven frequency response o n the resulting filters of the two inputs. I didn't. The attenuation at 2

I expected the two input impedances to then be equal resulting in matched frequency responses, but they were not matched.

am attaching the LTspice code below.

lyzes this so I can understand what is happening. When I look at this as t wo separate single ended inputs I expect the impedance to be twice as high on the non-inverting input. When I look at it as differential inputs with a differential signal the non-inverting input seems to have three times the impedance as the inverting input. When I look at the common mode signal t he two inputs seem to have the same impedance.

at

ut Amp. The decoupling caps are on my board.

han R18 which should be 600 ohms I expect. This will be supplied by the cu stomer once we decide how best to do the two variations.

n equal impact on the frequency response of the circuit. While these do no t need to be what sets the frequency response at the low end, unless I want to up their value significantly they will be what sets the low end frequen cy response in the input circuit. I'm also concerned about upsetting the c ommon mode rejection due to an imbalance for low frequencies like power lin e noise.

ce at points INA and INB without the caps in the circuit. That will allow me to understand the impact of adding the capacitors C100 and C101.

I know that. But I don't understand why the inverting input has the same i nput impedance as the non-inverting input. How did you come to your conclu sion?

What you just described is common mode which is the case where my paper ana lysis says the two input impedances are equal with high rejection.

a 600 ohm circuit so assume a 600 ohm source impedance and a 600 ohm termin ation.

It should be between the two input terminals of course.

Really, the input signal should be between the two inputs as well since it is a differential signal. I also ran simulations with the signal on each i nput separately.

I'm more interested in understanding the theory of the differential operati on. My simulations have shown no situation where the input impedances are not equal and in fact the value appears to be around 40 kohms on each input leg. I just can't explain that for a differential input signal.

Yes, I agree. I thought that was what you wanted.

Ok, I can't help with the theory. Sorry.

The op amp uses four 20 kohm resistors so the two dividers are 1:1. I exp ected this to give 40 kohm input impedance for the non-inverting input impe dance and 20 kohm input impedance for the inverting input. Combine that wi th 1 uF input coupling caps and I expected to see uneven frequency response on the resulting filters of the two inputs. I didn't. The attenuation at 20 Hz was very even between the two inputs.

r. I expected the two input impedances to then be equal resulting in match ed frequency responses, but they were not matched.

I am attaching the LTspice code below.

nalyzes this so I can understand what is happening. When I look at this as two separate single ended inputs I expect the impedance to be twice as hig h on the non-inverting input. When I look at it as differential inputs wit h a differential signal the non-inverting input seems to have three times t he impedance as the inverting input. When I look at the common mode signal the two inputs seem to have the same impedance.

s at

nput Amp. The decoupling caps are on my board.

than R18 which should be 600 ohms I expect. This will be supplied by the customer once we decide how best to do the two variations.

an equal impact on the frequency response of the circuit. While these do not need to be what sets the frequency response at the low end, unless I wa nt to up their value significantly they will be what sets the low end frequ ency response in the input circuit. I'm also concerned about upsetting the common mode rejection due to an imbalance for low frequencies like power l ine noise.

ance at points INA and INB without the caps in the circuit. That will allo w me to understand the impact of adding the capacitors C100 and C101.

in

are

rts

o I know that. But I don't understand why the inverting input has the same input impedance as the non-inverting input. How did you come to your conc lusion?

If

hms.

OA

analysis says the two input impedances are equal with high rejection.

Yes, my concern is the functionality for common mode signals. I have alrea dy verified the functionality in the simulation. I am trying to understand what is going on. I suspect the problem lies in the questions I am asking rather than the answers. I just tried using a differential input - not gr ound referenced - to analyze the voltage and current at the inputs. The in verting input shows nearly zero volts of AC signal and the other shows the full half volt. That makes it hard to calculate the impedance. lol I gu ess I'll have to provide ground referenced inputs.

When I do that I get 40 kohms for the non-inverting input impedance and 13.

y a 600 ohm circuit so assume a 600 ohm source impedance and a 600 ohm term ination.

it is a differential signal. I also ran simulations with the signal on ea ch input separately.

ration. My simulations have shown no situation where the input impedances are not equal and in fact the value appears to be around 40 kohms on each i nput leg. I just can't explain that for a differential input signal.

Yeah, thanks.

Differential - say +ve input at +1V and -ve at -1V. +ve input impedance is 40kR as is obvious. Op-amp non-inverting pin is +0.5V as must be inverting pin. So -ve input is -1V through 20kR to +0.5V so -1.5V across 20kR which is -75uA and -1V supplying -75uA = 13.33kR, see circuit below, run it and measure V and I at the two voltage sources...

Version 4 SHEET 1 880 680 WIRE 80 16 32 16 WIRE 224 16 160 16 WIRE 352 16 304 16 WIRE 400 16 352 16 WIRE 528 16 480 16 WIRE -176 64 -176 32 WIRE 416 160 416 128 WIRE -176 176 -176 144 WIRE -176 176 -224 176 WIRE 352 176 352 16 WIRE 384 176 352 176 WIRE -224 192 -224 176 WIRE 528 192 528 16 WIRE 528 192 448 192 WIRE -176 208 -176 176 WIRE 32 208 32 16 WIRE 80 208 32 208 WIRE 224 208 160 208 WIRE 352 208 304 208 WIRE 384 208 352 208 WIRE 416 256 416 224 WIRE 32 272 32 208 WIRE 352 272 352 208 WIRE -176 320 -176 288 WIRE 352 384 352 352 FLAG 352 384 0 FLAG -224 192 0 FLAG 416 128 +S FLAG 416 256 -S FLAG -176 320 -S FLAG -176 32 +S FLAG 32 272 0 SYMBOL Opamps\\AD822 416 128 R0 SYMATTR InstName U1 SYMBOL voltage -176 48 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 10 SYMBOL voltage -176 192 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 10 SYMBOL res 496 0 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 20k SYMBOL res 320 0 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 20k SYMBOL res 320 192 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 20k SYMBOL res 368 368 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R4 SYMATTR Value 20k SYMBOL voltage 176 16 R90 WINDOW 0 -32 56 VBottom 2 WINDOW 3 32 56 VTop 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value -1 SYMBOL voltage 176 208 R90 WINDOW 0 -32 56 VBottom 2 WINDOW 3 32 56 VTop 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V4 SYMATTR Value +1 TEXT -248 408 Left 2 !.tran 1m