opamp clamp

The base voltages only need to be created once for many channels, and are a simple voltage divider from +5 to ground, two diode-connected transistors and 3 resistors.

The follower clamp is perfectly stable as long as the opamp is unity-gain stable. The "clint" circuit is nice because it is simple, precise, and is easily temperature compensated, but it likes to oscillate because the common-base voltage gain is so high. Another 22 pF across the opamp fixes it.

It's tragic that my customers will never appreciate what elegant clamp circuits I'll be giving them.

John

I agree, the follower-feedback ckt is stable, with no ringing on steps, etc. I used an opa27 opamp, with 20k resistors and 2n3904 + 2n3906 BJTs. Looked good. Adding 8pF to slow it to 1MHz was fine, in or out. And adding 100 ohms between the emitters and the SJ, to make Jim happy, didn't matter one way or the other.

I'm really surprised... the current gain of the followers portended trouble. As opposed to common base clamps, which I've never had any problems with. Was there a lot of capacitance at the "SJ" ??

...Jim Thompson

The problem is (usually) that the output rails _before_ the end nodes of the compensation cap run out of head-room, thus requiring some discharging before the OpAmp gets back into its linear region.

I have seen bipolar OpAmp designs that increase the input stage differential current drive by a large amount when the "SJ" lifts, thus giving lots of "oomph" to get the compensation cap back where it belongs.

I haven't seen that in a CMOS design.

...Jim Thompson

Why would anybody want to make Jim happy?

John

If the opamp is unity-gain stable, connecting the output directly to the inv input is fine. So adding emitter followers in that path is fine, too.

John

Well you can short circuit some of that massively parallel quantum computing of random permutations when you apply a little thought. Your basic objectives are to preserve the virtual ground at the OA input (so as to prevent that 'windup' you're so afraid of) and also clamp the output between two limits, more or less precisely. That basic OA inverter doesn't leave you a lot of options, implement an asymmetrical low impedance breakover path around the feedback resistor. If you think about separating the functionality out into better circuits, you can come up with all kinds of stuff. One possibility is shown below. I didn't do any analysis on it, just a quick SPICE run over various triangles and sine inputs in the 1K-100KHz range with 1V-200V amplitudes. It is passable but probably needs more work. The virtual grounds are preserved all around and the clamp levels are precision: View in a fixed-width font such as Courier.

. . . . R1 R2 . Vin>----[20k]---+------[20k]---. . | | . .----|>|-----+------|>|-----+ . | D1 | D2 | . | | +12V | . | | |\\| | . | '--|-\\ U1A | . | R3 | >--------+-->Vout . | +12-[1.2k]-+--|+/ | . | | |/| | . | D3 v -12V | . | - | . | | | . | - | . | 0 +12V | . | |/| | . | U1B /+|-------' . '-----------+----< | R4 . | \\-|--+-[10k]--

I assume both the pee break and the movie are over?

One can only hope. ;-)

-- Service to my country? Been there, Done that, and I've got my DD214 to prove it. Member of DAV #85.

Michael A. Terrell Central Florida

Yep, but I was out all day yesterday and today (Friday and Saturday). I should have some time on Sunday.

...Jim Thompson

What transistor types were used?

...Jim Thompson

The voltage limits are all wrong under heavy overdrive, about 6V and

-0.75V, what good is that?

Values for input and feedback resistors?

...Jim Thompson

There are dynamic biasing schemes in CMOS that sound similar to what you described. Eric Vittoz has a micropower book with these tricks, though a check at Amazon doesn't turn it up. My copy isn't on my "ready reference" shelf, so I guess it's boxed up or loaned out.

John used 50k and an LT1124 opamp in his post, ftp://66.117.156.8/Clipper.jpg I tried 20k and an OP27. I don't know what NPN and PNPs John used; in an effort to keep the die size (capacitance) down, I used 2n3904 and 2n3906.

Anyone have a subcircuit for an LT1124 ??

I would want to run in PSpice so I can use my "world-renowned" loop gain and phase checker ;-)

...Jim Thompson

I'm surprised PSpice doesn't include it in their library. IntuSoft has it, I'll take the liberty of copy and paste:

.SUBCKT LT1124 3 2 7 4 6

• INPUT RC1 7 80 80 RC2 7 90 80 Q1 80 2 10 QM1 Q2 90 3 11 QM2 CIN 2 3 2.0000E-12 DDM1 2 104 DM2 DDM3 104 3 DM2 DDM2 3 105 DM2 DDM4 105 2 DM2 C1 80 91 10NF RE1 10 12 -73 RE2 11 12 -73 IEE 12 4 3.40E-04 RE 12 0 1.0100E+06

• RXC1 91 90 25 CXC1 91 90 400E-12 RXC2 8 98 20K C2 1 98 29E-12 CXC2 98 8 40.000E-12

• INTERMEDIATE GCM 0 8 12 0 3.4887E-09 GA 8 0 80 90 5.5292E-03 R2 8 0 1.0000E+05 GB 1 0 8 0 7.2964E+01 RO2 1 0 7.4000E+01

• OUTPUT RSO 1 6 1.0000E+00 ECL 18 0 1 6 3.6430E+01 GCL 0 8 20 0 1.0000E+00 RCL 20 0 1.0000E+01 D1 18 19 DM1 VOD1 19 20 0.0000E+00 D2 20 21 DM1 VOD2 21 18 0.0000E+00

• D3A 131 70 DM3 D3B 13 131 DM3 GPL 0 8 70 7 1.0000E+00 VC 13 6 2.6370E+00 RPLA 7 70 1.0000E+01 RPLB 7 131 1.0000E+03 D4A 60 141 DM3 D4B 141 14 DM3 GNL 0 8 60 4 1.0000E+00 VE 6 14 2.6370E+00 RNLA 60 4 1.0000E+01 RNLB 141 4 1.0000E+03

• IP 7 4 2.1020E-03 DSUB 4 7 DM2

• MODELS .MODEL QM1 NPN (IS=8.0000E-16 BF=17.8E+03) .MODEL QM2 NPN (IS=8.0077E-16 BF=37.8E+03) .MODEL DM1 D (IS=1.0000E-20) .MODEL DM2 D (IS=8.0000E-16 BV=5.2800E+01) .MODEL DM3 D (IS=1.0000E-16) .ENDS LT1124

Surprise!

Only mild over-shoot when driven hard.

...Jim Thompson