opamp clamp

In laymans' terms, that's about two tenths of a volt.

OK, this is the way I finally, absolutely plan to do it. Probably.

ftp://66.117.156.8/FinalClamp.JPG

John

What? No loop to keep the signal centered between the clamps ?:-)

...Jim Thompson

How about... +--R-------+ | |

-R---+--|- \\ | |VCA----+-----out G-|+ / | | | ^ | [window comparator]

Gotta wonder how unstable that would be...

D from BC

Your subject title, don't, was appropriate.

Zener diodes are horrible processing elements, unless you've found some magical ones someplace. And, they have an ugly high capacitance.

What was wrong with your two EF to the SJ ckt? Fast (with small transistors), nicely analytical and precisely adjustable, and unit-to-unit in- production predictable. So what's not to like?

I found the formula for R1 R2 and R3 a little messy, but hey! at least there's a formula!

John just doesn't know how to let go of a bad circuit, particularly when it's his own design ;-)

Although the above looks pretty bad as well ;-)

...Jim Thompson

Oh, *that* final circuit? That was ages ago. A 5.6 volt SOT-23 zener measures about 100 pF shunt capacitance, way too much.

So,

ftp://66.117.156.8/FinalFinal.JPG

where VCH and VCL are of course temperature compensated, and bussed to all channels.

John

I didn't do a formula, I just sort of did it. It was awful.

I've let go of tons of bad circuits. Tons of pretty good ones, too. Falling in love with a circuit is dangerous. I've seen disasters that happened because somebody wouldn't let go of a clever but fatally flawed circuit or architecture.

There must be some deep underlying thing going on here. Given a problem and a reasonable set of components (resistors, diodes, transistors, zeners, voltage sources in this case) and given a reasonable budget on complexity (say, 6 parts max to do the clamp thing) there must be a very large but finite set of circuits that could be arranged from the allowed set of parts, with all possible weird connections. So the engineer's job is to (somehow) permutate all the possible combinations and pick the best one. That sounds like a massively-parallel-quantum-computing sort of project, definitely not an analytical process.

No, really, that one's not bad.

John

Same here. Scares the hell out of clients when you trash a design after a preliminary design review ;-)

I have concerns about stability.

...Jim Thompson

Now look at this schematics again:

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Let's get really radical... :) (If I understand JL's app correctly..) How about...

D from BC

Why let it bother you! , MS didn't seem to have much conscience releasing VISTA !:)

That's OK, except that I need higher-value feedback resistors (like

John

Zeners are partially compensated because of the feedback. As for the high impedance, the non-inverting input can be used.

This circuit clips to 1/2 of the diode drop below the ground, so I think there shouldn't be any problems. You can make it even closer to the ground by adjusting the ratio of the resistors.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Can you elaborate on "overcharge"?

Incidentally, it is possible on a fancy design to have the compensation cap get bootstrapped, and that would really charge it You could get this effect if a cap terminal sees only one sex of transistor. That is, there is no natural parasitic diode clamp. In the design, if you think it's a problem, the node is attached to the drain of a fet whose gate and source go to appropriate power rail. Basically a parasitic diode that can pass layout verification software.

The only thing that made it awful was the goal of saving one resistor by combining the +v and -v dividers into one. But even so, not intractable.

I agree.

Hah, then state them for analysis! I thought about the transistor's Ceb when back biased, from the SJ to ground, but that's pretty small and easily dealt with, by using small-area transistors, and by adding a small feedback cap. Leakage doesn't appear to be a problem.

So, speak up Jim, what's bothering you?

Looks stable to me, especially so since it simulates nicely.

This is a little more interesting, stability-wise, the clamp for the downstream integrator stage...

ftp://66.117.156.8/Clint.JPG

John

Just my gut feel. I'll run my world-renowned loop-gain analysis on it. I'll bet you it rings. Now back to the movie in progress after the pee break ;-)

...Jim Thompson

And why not a CFA? They don't suffer from saturation.

- Henry

I agree, and a small feedback cap can assure this.

Ouch, same ugly high gain feedback path, two awkward voltages to create, revealing its simplicity, NOT.